doc: describe timestamp limitations for mlx5

Message ID 20211108164101.26308-1-viacheslavo@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series doc: describe timestamp limitations for mlx5 |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/github-robot: build success github build: passed
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-spell-check-testing warning Testing issues
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-intel-Functional fail Functional Testing issues
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS

Commit Message

Slava Ovsiienko Nov. 8, 2021, 4:41 p.m. UTC
  The ConnectX NIC series hardware provides only 63-bit
wide timestamps. The imposed limitations description
added to documentation.

At the moment there are no affected applications known
or bug reports neither, this is just the declaration
of limitation.

Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 doc/guides/nics/mlx5.rst | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
  

Comments

Raslan Darawsheh Nov. 10, 2021, 8:51 a.m. UTC | #1
Hi,

> -----Original Message-----
> From: Slava Ovsiienko <viacheslavo@nvidia.com>
> Sent: Monday, November 8, 2021 6:41 PM
> To: dev@dpdk.org
> Cc: Raslan Darawsheh <rasland@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; stable@dpdk.org
> Subject: [PATCH] doc: describe timestamp limitations for mlx5
> 
> The ConnectX NIC series hardware provides only 63-bit
> wide timestamps. The imposed limitations description
> added to documentation.
> 
> At the moment there are no affected applications known
> or bug reports neither, this is just the declaration
> of limitation.
> 
> Cc: stable@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> ---

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index d175c2061e..043d006a2b 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -480,6 +480,19 @@  Limitations
 
   - Needs OFED 5.4+.
 
+- Timestamps:
+
+  - CQE timestamp field width is limited by hardware to 63 bits, msb is zero
+  - in the free-running mode the timestamp coounter is reset on power on
+    and 63-bit value provides over 1800 years of uptime till overflow
+  - in the real-time mode (configurable with REAL_TIME_CLOCK_ENABLE firmware
+    settings), the timestamp presents the nanoseconds elapsed since 01-Jan-1970,
+    hardware timestamp overflow will happen on 19-Jan-2038
+    (0x80000000 seconds since 01-Jan-1970)
+  - the send scheduling is based on timestamps from the reference "Clock Queue"
+    completions, the scheduled send timestamps should not be specified
+    with non-zero msb
+
 Statistics
 ----------
 
@@ -1242,6 +1255,10 @@  Below are some firmware configurations listed.
    FLEX_PARSER_PROFILE_ENABLE=4
    PROG_PARSE_GRAPH=1
 
+- enable realtime timestamp format::
+
+   REAL_TIME_CLOCK_ENABLE=1
+
 Linux Prerequisites
 -------------------