[3/4] net/mlx5: support querying delay drop status via ethtool

Message ID 20211104112644.17278-4-bingz@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers
Series Add delay drop support for Rx queue |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Bing Zhao Nov. 4, 2021, 11:26 a.m. UTC
  The delay drop is global per PF device and the kernel driver is
taking care of the initialization and rearming. By default, the
timeout value is set to activate the delay drop when the driver
is loaded.

A private flag "dropless_rq" is used to control the rearming. Only
when it is on, the rearming will be handled once received a timeout
event. Or else, the delay drop will be deactived after the first
timeout and all the Rx queues won't have this feature.

The PMD is trying to query this flag and warn the application when
some queues are created with delay drop but the flag is off.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
---
 drivers/net/mlx5/linux/mlx5_ethdev_os.c | 113 ++++++++++++++++++++++++
 drivers/net/mlx5/mlx5.h                 |   1 +
 drivers/net/mlx5/mlx5_trigger.c         |  10 +++
 3 files changed, 124 insertions(+)
  

Patch

diff --git a/drivers/net/mlx5/linux/mlx5_ethdev_os.c b/drivers/net/mlx5/linux/mlx5_ethdev_os.c
index 9d0e491d0c..9255877dab 100644
--- a/drivers/net/mlx5/linux/mlx5_ethdev_os.c
+++ b/drivers/net/mlx5/linux/mlx5_ethdev_os.c
@@ -1630,3 +1630,116 @@  mlx5_get_mac(struct rte_eth_dev *dev, uint8_t (*mac)[RTE_ETHER_ADDR_LEN])
 	memcpy(mac, request.ifr_hwaddr.sa_data, RTE_ETHER_ADDR_LEN);
 	return 0;
 }
+
+/*
+ * Query dropless_rq private flag provided by ETHTOOL.
+ *
+ * @param dev
+ *   Pointer to Ethernet device.
+ *
+ * @return
+ *   0 on success, negative errno value otherwise and rte_errno is set.
+ */
+int mlx5_get_flag_dropless_rq(struct rte_eth_dev *dev)
+{
+	struct {
+		struct ethtool_sset_info hdr;
+		uint32_t buf[1];
+	} sset_info;
+	struct ethtool_drvinfo drvinfo;
+	struct ifreq ifr;
+	struct ethtool_gstrings *strings = NULL;
+	struct ethtool_value flags;
+	int32_t str_sz;
+	int32_t len;
+	int32_t i;
+	int ret;
+
+	sset_info.hdr.cmd = ETHTOOL_GSSET_INFO;
+	sset_info.hdr.reserved = 0;
+	sset_info.hdr.sset_mask = 1ULL << ETH_SS_PRIV_FLAGS;
+	ifr.ifr_data = (caddr_t)&sset_info;
+	ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
+	if (!ret) {
+		const uint32_t *sset_lengths = sset_info.hdr.data;
+
+		len = sset_info.hdr.sset_mask ? sset_lengths[0] : 0;
+	} else if (ret == -EOPNOTSUPP) {
+		drvinfo.cmd = ETHTOOL_GDRVINFO;
+		ifr.ifr_data = (caddr_t)&drvinfo;
+		ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
+		if (ret) {
+			DRV_LOG(WARNING, "port %u cannot get the driver info",
+				dev->data->port_id);
+			goto exit;
+		}
+		len = *(uint32_t *)((char *)&drvinfo +
+			offsetof(struct ethtool_drvinfo, n_priv_flags));
+	} else {
+		DRV_LOG(WARNING, "port %u cannot get the sset info",
+			dev->data->port_id);
+		goto exit;
+	}
+	if (!len) {
+		DRV_LOG(WARNING, "port %u does not have private flag",
+			dev->data->port_id);
+		rte_errno = EOPNOTSUPP;
+		ret = -rte_errno;
+		goto exit;
+	} else if (len > 32) {
+		DRV_LOG(WARNING, "port %u maximal private flags number is 32",
+			dev->data->port_id);
+		len = 32;
+	}
+	str_sz = ETH_GSTRING_LEN * len;
+	strings = (struct ethtool_gstrings *)
+		  mlx5_malloc(0, str_sz + sizeof(struct ethtool_gstrings), 0,
+			      SOCKET_ID_ANY);
+	if (!strings) {
+		DRV_LOG(WARNING, "port %u unable to allocate memory for"
+			" private flags", dev->data->port_id);
+		rte_errno = ENOMEM;
+		ret = -rte_errno;
+		goto exit;
+	}
+	strings->cmd = ETHTOOL_GSTRINGS;
+	strings->string_set = ETH_SS_PRIV_FLAGS;
+	strings->len = len;
+	ifr.ifr_data = (caddr_t)strings;
+	ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
+	if (ret) {
+		DRV_LOG(WARNING, "port %u unable to get private flags strings",
+			dev->data->port_id);
+		goto exit;
+	}
+	for (i = 0; i < len; i++) {
+		strings->data[(i + 1) * ETH_GSTRING_LEN - 1] = 0;
+		if (!strcmp((const char *)strings->data + i * ETH_GSTRING_LEN,
+			     "dropless_rq"))
+			break;
+	}
+	if (i == len) {
+		DRV_LOG(WARNING, "port %u does not support dropless_rq",
+			dev->data->port_id);
+		rte_errno = EOPNOTSUPP;
+		ret = -rte_errno;
+		goto exit;
+	}
+	flags.cmd = ETHTOOL_GPFLAGS;
+	ifr.ifr_data = (caddr_t)&flags;
+	ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
+	if (ret) {
+		DRV_LOG(WARNING, "port %u unable to get private flags status",
+			dev->data->port_id);
+		goto exit;
+	}
+	if (!(flags.data & (1U << i)))
+		DRV_LOG(WARNING, "port %u dropless_rq flag is off, no rearming",
+			dev->data->port_id);
+	else
+		DRV_LOG(DEBUG, "port %u support dropless_rq with rearming",
+			dev->data->port_id);
+exit:
+	mlx5_free(strings);
+	return ret;
+}
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 8d32d55c9a..e0f40ce31a 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1599,6 +1599,7 @@  int mlx5_os_read_dev_stat(struct mlx5_priv *priv,
 int mlx5_os_read_dev_counters(struct rte_eth_dev *dev, uint64_t *stats);
 int mlx5_os_get_stats_n(struct rte_eth_dev *dev);
 void mlx5_os_stats_init(struct rte_eth_dev *dev);
+int mlx5_get_flag_dropless_rq(struct rte_eth_dev *dev);
 
 /* mlx5_mac.c */
 
diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c
index ebeeae279e..2644855483 100644
--- a/drivers/net/mlx5/mlx5_trigger.c
+++ b/drivers/net/mlx5/mlx5_trigger.c
@@ -1126,6 +1126,16 @@  mlx5_dev_start(struct rte_eth_dev *dev)
 			dev->data->port_id, strerror(rte_errno));
 		goto error;
 	}
+	if (priv->config.std_delay_drop || priv->config.hp_delay_drop) {
+		if (!priv->config.vf && !priv->config.sf &&
+		    !priv->representor) {
+			(void)mlx5_get_flag_dropless_rq(dev);
+		} else {
+			DRV_LOG(INFO,
+				"port %u doesn't support dropless_rq flag",
+				dev->data->port_id);
+		}
+	}
 	ret = mlx5_rxq_start(dev);
 	if (ret) {
 		DRV_LOG(ERR, "port %u Rx queue allocation failed: %s",