diff mbox series

[v2,5/8] net/mlx5: supports flow item of normal Tx queue

Message ID 20211016080732.1781622-6-xuemingl@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: support more than 255 representors |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Xueming Li Oct. 16, 2021, 8:07 a.m. UTC 
  Extends txq flow pattern to support both hairpin and regular txq.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

Comments

Slava Ovsiienko Oct. 19, 2021, 8:27 a.m. UTC | #1 
> -----Original Message-----
> From: Xueming(Steven) Li <xuemingl@nvidia.com>
> Sent: Saturday, October 16, 2021 11:07
> To: dev@dpdk.org
> Cc: Xueming(Steven) Li <xuemingl@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Lior Margalit <lmargalit@nvidia.com>; Matan
> Azrad <matan@nvidia.com>
> Subject: [PATCH v2 5/8] net/mlx5: supports flow item of normal Tx queue
> 
> Extends txq flow pattern to support both hairpin and regular txq.
> 
> Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index f06ce54f7e7..4a17ca64a2e 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -10910,22 +10910,22 @@  flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
 	void *misc_v =
 		MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
 	struct mlx5_txq_ctrl *txq;
-	uint32_t queue;
-
+	uint32_t queue, mask;
 
 	queue_m = (const void *)item->mask;
-	if (!queue_m)
-		return;
 	queue_v = (const void *)item->spec;
 	if (!queue_v)
 		return;
 	txq = mlx5_txq_get(dev, queue_v->queue);
 	if (!txq)
 		return;
-	queue = txq->obj->sq->id;
-	MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
-	MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
-		 queue & queue_m->queue);
+	if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
+		queue = txq->obj->sq->id;
+	else
+		queue = txq->obj->sq_obj.sq->id;
+	mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
+	MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
+	MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
 	mlx5_txq_release(dev, queue_v->queue);
 }