[v6,04/17] net/i40e/base: define new shadow RAM pointers

Message ID 20211009013956.70937-5-robinx.zhang@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series i40e base code update |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Robin Zhang Oct. 9, 2021, 1:39 a.m. UTC
  Add definitions for Shadow RAM pointers: 6th FPA(Free Provisioning Area)
module, 5th FPA module in X722 and Preservation Rules module.

These definitions are not using by DPDK now, the purpose of this commit
is sync with latest share code.

Signed-off-by: Stanislaw Grzeszczak <stanislaw.a.grzeszczak@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
---
 drivers/net/i40e/base/i40e_type.h | 3 +++
 1 file changed, 3 insertions(+)
  

Patch

diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index cf41345834..e5a3729183 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -1555,6 +1555,9 @@  struct i40e_hw_port_stats {
 #define I40E_SR_FEATURE_CONFIGURATION_PTR	0x49
 #define I40E_SR_CONFIGURATION_METADATA_PTR	0x4D
 #define I40E_SR_IMMEDIATE_VALUES_PTR		0x4E
+#define I40E_SR_PRESERVATION_RULES_PTR		0x70
+#define I40E_X722_SR_5TH_FREE_PROVISION_AREA_PTR	0x71
+#define I40E_SR_6TH_FREE_PROVISION_AREA_PTR	0x71
 
 /* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */
 #define I40E_SR_VPD_MODULE_MAX_SIZE		1024