diff mbox series

[v5,02/17] net/i40e/base: add Min SRev for 4 more X722 modules

Message ID 20211009012648.64838-3-robinx.zhang@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Qi Zhang
Headers
Series i40e base code update |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Robin Zhang Oct. 9, 2021, 1:26 a.m. UTC 
  Some customers want to downgrade to an earlier FW security revision, this
already implemented by FW so that customers can have more control over
the security revisions they can use. FW also implemented a mechanism via
NVMupdate to allow the users to accept or not a baseline Min SRev version
that will limit the secure version rollback only down to that level.

This commit increments X722 API version and adds new minimal rollback
revision that related to the extended implementation of Security Revision
Opt-In for 4 more X722 modules.

These definations are not using by DPDK now, the purpose of this commit
is sync with latest share code.

Signed-off-by: Stanislaw Grzeszczak <stanislaw.a.grzeszczak@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
---
 drivers/net/i40e/base/i40e_adminq_cmd.h | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index 2ca41db5d3..a96527f31c 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -12,7 +12,7 @@ 
  */
 
 #define I40E_FW_API_VERSION_MAJOR	0x0001
-#define I40E_FW_API_VERSION_MINOR_X722	0x000B
+#define I40E_FW_API_VERSION_MINOR_X722	0x000C
 #define I40E_FW_API_VERSION_MINOR_X710	0x000C
 
 #define I40E_FW_MINOR_VERSION(_h) ((_h)->mac.type == I40E_MAC_XL710 ? \
@@ -2425,11 +2425,15 @@  struct i40e_aqc_rollback_revision_update {
 	u8	optin_mode; /* bool */
 #define I40E_AQ_RREV_OPTION_MODE			0x01
 	u8	module_selected;
-#define I40E_AQ_RREV_MODULE_PCIE_ANALOG		0
-#define I40E_AQ_RREV_MODULE_PHY_ANALOG		1
-#define I40E_AQ_RREV_MODULE_OPTION_ROM		2
-#define I40E_AQ_RREV_MODULE_EMP_IMAGE		3
-#define I40E_AQ_RREV_MODULE_PE_IMAGE		4
+#define I40E_AQ_RREV_MODULE_PCIE_ANALOG			0
+#define I40E_AQ_RREV_MODULE_PHY_ANALOG			1
+#define I40E_AQ_RREV_MODULE_OPTION_ROM			2
+#define I40E_AQ_RREV_MODULE_EMP_IMAGE			3
+#define I40E_AQ_RREV_MODULE_PE_IMAGE			4
+#define I40E_AQ_RREV_MODULE_PHY_PLL_O_CONFIGURATION	5
+#define I40E_AQ_RREV_MODULE_PHY_0_CONFIGURATION		6
+#define I40E_AQ_RREV_MODULE_PHY_PLL_1_CONFIGURATION	7
+#define I40E_AQ_RREV_MODULE_PHY_1_CONFIGURATION		8
 	u8	reserved1[2];
 	u32	min_rrev;
 	u8	reserved2[8];