From patchwork Mon Sep 27 08:22:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Kumar Kori X-Patchwork-Id: 99725 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B86B1A0547; Mon, 27 Sep 2021 10:23:24 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8014141122; Mon, 27 Sep 2021 10:22:52 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id B6D4341122 for ; Mon, 27 Sep 2021 10:22:51 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 18QNoYFV027730; Mon, 27 Sep 2021 01:22:49 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=5/FFo/rgz5/F7puiks/jqwaCsDOPofrlAKEZvNrexY8=; b=UCv4Ktg0GVsdEIp2VqhfTn2iXPd92UixsaQEzhQjILcclKwctXxajwwXiPPL/eOx7XZ1 r40Zi9lFY4bxce+14TwjyjtNA5OVyHm5D8npvYF3FdlCZ1tpCwAJ85Cx8otO+K3G5afm KvtYxk1eE/Ib4kczEqJW7OyGp2pWGoFMPjN/UOJfMO9DkbbJPi+5pQzcVWTRwuf+P39S Az0o98SuY1dv99YdXi8hSIS/pZT8uLAHqe7sAMDqbIWLmelo2pOXc1K3twAZDr7uKkgC 4pDQSgF1M8t85+AhyRhVdMECaqFeEQ+O19S53pIOs0l0YkvvunB95kQyVn000PS+h6hJ Pw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 3bavvuhtsb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 27 Sep 2021 01:22:48 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 27 Sep 2021 01:22:46 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 27 Sep 2021 01:22:46 -0700 Received: from localhost.localdomain (unknown [10.28.34.25]) by maili.marvell.com (Postfix) with ESMTP id 1789A3F7043; Mon, 27 Sep 2021 01:22:44 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ray Kinsella CC: Date: Mon, 27 Sep 2021 13:52:04 +0530 Message-ID: <20210927082223.757436-8-skori@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210927082223.757436-1-skori@marvell.com> References: <20210927082223.757436-1-skori@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 8nYuEgMe6RlbFUeT0x2Syt91KtVv5MsZ X-Proofpoint-GUID: 8nYuEgMe6RlbFUeT0x2Syt91KtVv5MsZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-27_02,2021-09-24_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH v2 08/27] common/cnxk: support RoC API to dump bandwidth profile X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Implement RoC API to dump bandwidth profile on CN10K platform. Signed-off-by: Sunil Kumar Kori --- v2: - Rebase support on latest DPDK - Handled multilevel chaining for linear hierarchy - Review comments incorporated drivers/common/cnxk/roc_nix.h | 3 ++ drivers/common/cnxk/roc_nix_bpf.c | 86 ++++++++++++++++++++++++++++++ drivers/common/cnxk/roc_platform.h | 1 + drivers/common/cnxk/version.map | 1 + 4 files changed, 91 insertions(+) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index b4995cd014..de8d41e42e 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -611,6 +611,9 @@ int __roc_api roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id, int __roc_api roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id, struct roc_nix_rq *rq, bool enable); +int __roc_api roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id, + enum roc_nix_bpf_level_flag lvl_flag); + uint8_t __roc_api roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag); diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c index 4dcf4cd5b9..1e495159f4 100644 --- a/drivers/common/cnxk/roc_nix_bpf.c +++ b/drivers/common/cnxk/roc_nix_bpf.c @@ -123,6 +123,60 @@ meter_burst_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p) return METER_BURST(exponent, mantissa); } +static inline void +nix_lf_bpf_dump(__io struct nix_band_prof_s *bpf) +{ + plt_dump("W0: cir_mantissa \t\t\t%d\nW0: pebs_mantissa \t\t\t0x%03x", + bpf->cir_mantissa, bpf->pebs_mantissa); + plt_dump("W0: peir_matissa \t\t\t\t%d\nW0: cbs_exponent \t\t\t%d", + bpf->peir_mantissa, bpf->cbs_exponent); + plt_dump("W0: cir_exponent \t\t\t%d\nW0: pebs_exponent \t\t\t%d", + bpf->cir_exponent, bpf->pebs_exponent); + plt_dump("W0: peir_exponent \t\t\t%d\n", bpf->peir_exponent); + plt_dump("W0: tnl_ena \t\t\t%d\n", bpf->tnl_ena); + plt_dump("W0: icolor \t\t\t%d\n", bpf->icolor); + plt_dump("W0: pc_mode \t\t\t%d\n", bpf->pc_mode); + plt_dump("W1: hl_en \t\t%d\nW1: band_prof_id \t\t%d", bpf->hl_en, + bpf->band_prof_id); + plt_dump("W1: meter_algo \t\t%d\nW1: rc_action \t\t%d", bpf->meter_algo, + bpf->rc_action); + plt_dump("W1: yc_action \t\t\t%d\nW1: gc_action \t\t\t%d", + bpf->yc_action, bpf->gc_action); + plt_dump("W1: adjust_mantissa\t\t\t%d\nW1: adjust_exponent \t\t\t%d", + bpf->adjust_mantissa, bpf->adjust_exponent); + plt_dump("W1: rdiv \t\t\t%d\n", bpf->rdiv); + plt_dump("W1: l_select \t\t%d\nW2: lmode \t\t%d", bpf->l_sellect, + bpf->lmode); + plt_dump("W1: cbs_mantissa \t\t\t%d\n", bpf->cbs_mantissa); + plt_dump("W2: tsa \t\t\t0x%" PRIx64 "\n", (uint64_t)bpf->ts); + plt_dump("W3: c_accum \t\t%d\nW3: pe_accum \t\t%d", bpf->c_accum, + bpf->pe_accum); + plt_dump("W4: green_pkt_pass \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->green_pkt_pass); + plt_dump("W5: yellow_pkt_pass \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->yellow_pkt_pass); + plt_dump("W6: red_pkt_pass \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->red_pkt_pass); + plt_dump("W7: green_octs_pass \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->green_octs_pass); + plt_dump("W8: yellow_octs_pass \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->yellow_octs_pass); + plt_dump("W9: red_octs_pass \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->red_octs_pass); + plt_dump("W10: green_pkt_drop \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->green_pkt_drop); + plt_dump("W11: yellow_pkt_drop \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->yellow_pkt_drop); + plt_dump("W12: red_pkt_drop \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->red_pkt_drop); + plt_dump("W13: green_octs_drop \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->green_octs_drop); + plt_dump("W14: yellow_octs_drop \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->yellow_octs_drop); + plt_dump("W15: red_octs_drop \t\t\t0x%" PRIx64 "", + (uint64_t)bpf->red_octs_drop); +} + uint8_t roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f) { @@ -480,3 +534,35 @@ roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id, struct roc_nix_rq *rq, exit: return rc; } + +int +roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id, + enum roc_nix_bpf_level_flag lvl_flag) +{ + struct mbox *mbox = get_mbox(roc_nix); + struct nix_cn10k_aq_enq_rsp *rsp; + struct nix_cn10k_aq_enq_req *aq; + uint8_t level_idx; + int rc; + + if (roc_model_is_cn9k()) + return NIX_ERR_HW_NOTSUP; + + level_idx = roc_nix_bpf_level_to_idx(lvl_flag); + if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID) + return NIX_ERR_PARAM; + + aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox); + if (aq == NULL) + return -ENOSPC; + aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14 | id); + aq->ctype = NIX_AQ_CTYPE_BAND_PROF; + aq->op = NIX_AQ_INSTOP_READ; + rc = mbox_process_msg(mbox, (void *)&rsp); + if (!rc) { + plt_dump("============= band prof id =%d ===============", id); + nix_lf_bpf_dump(&rsp->prof); + } + + return rc; +} diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h index 285b24b82d..69b7c49d8b 100644 --- a/drivers/common/cnxk/roc_platform.h +++ b/drivers/common/cnxk/roc_platform.h @@ -155,6 +155,7 @@ extern int cnxk_logtype_tm; #define plt_info(fmt, args...) RTE_LOG(INFO, PMD, fmt "\n", ##args) #define plt_warn(fmt, args...) RTE_LOG(WARNING, PMD, fmt "\n", ##args) #define plt_print(fmt, args...) RTE_LOG(INFO, PMD, fmt "\n", ##args) +#define plt_dump(fmt, ...) fprintf(stderr, fmt "\n", ##__VA_ARGS__) /** * Log debug message if given subsystem logging is enabled. diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 4c5adb8212..97386ef273 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -80,6 +80,7 @@ INTERNAL { roc_nix_bpf_alloc; roc_nix_bpf_config; roc_nix_bpf_count_get; + roc_nix_bpf_dump; roc_nix_bpf_ena_dis; roc_nix_bpf_free; roc_nix_bpf_free_all;