diff mbox series

[v4] net/ice: fix flow priority support in non-pipeline mode

Message ID 20210918064930.3623237-1-yuying.zhang@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series [v4] net/ice: fix flow priority support in non-pipeline mode |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/github-robot: build success github build: passed
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-mellanox-Functional fail Functional Testing issues
ci/iol-broadcom-Functional fail Functional Testing issues
ci/Intel-compilation success Compilation OK
ci/intel-Testing fail Testing issues
ci/iol-x86_64-compile-testing success Testing PASS

Commit Message

Zhang, Yuying Sept. 18, 2021, 6:49 a.m. UTC 
  Lower values denote higher priority with 0 as the maximum.
The usage of priority in non-pipeline mode is wrong.

This patch fixed this issue in switch filter and added input
validation of priority in FDIR, RSS and ACL filter which
only support one priority level.

Fixes: 2321e34c23b3 ("net/ice: support flow priority for DCF switch filter")
Cc: stable@dpdk.org

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
---
v4:
* Refine the description of commit log.
v3:
* Fix priority issue of FDIR in pipeline mode. Refine the priority validation.
v2:
* Replace magic number with marco and add comments to explain the calculation.
---
 drivers/net/ice/ice_acl_filter.c    |  5 ++++-
 drivers/net/ice/ice_fdir_filter.c   |  6 +++++-
 drivers/net/ice/ice_generic_flow.c  |  4 ++--
 drivers/net/ice/ice_hash.c          |  5 ++++-
 drivers/net/ice/ice_switch_filter.c | 11 +++++++++--
 5 files changed, 24 insertions(+), 7 deletions(-)

Comments

Qi Zhang Sept. 22, 2021, 7:29 a.m. UTC | #1 
> -----Original Message-----
> From: Zhang, Yuying <yuying.zhang@intel.com>
> Sent: Saturday, September 18, 2021 2:50 PM
> To: dev@dpdk.org; Zhang, Qi Z <qi.z.zhang@intel.com>; Yigit, Ferruh
> <ferruh.yigit@intel.com>
> Cc: Zhang, Yuying <yuying.zhang@intel.com>; stable@dpdk.org
> Subject: [PATCH v4] net/ice: fix flow priority support in non-pipeline mode
> 
> Lower values denote higher priority with 0 as the maximum.
> The usage of priority in non-pipeline mode is wrong.
> 
> This patch fixed this issue in switch filter and added input validation of priority
> in FDIR, RSS and ACL filter which only support one priority level.
> 
> Fixes: 2321e34c23b3 ("net/ice: support flow priority for DCF switch filter")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
diff mbox series

Patch

diff --git a/drivers/net/ice/ice_acl_filter.c b/drivers/net/ice/ice_acl_filter.c
index 0c15a7036c..614bd44e23 100644
--- a/drivers/net/ice/ice_acl_filter.c
+++ b/drivers/net/ice/ice_acl_filter.c
@@ -904,7 +904,7 @@  ice_acl_parse(struct ice_adapter *ad,
 	       uint32_t array_len,
 	       const struct rte_flow_item pattern[],
 	       const struct rte_flow_action actions[],
-	       uint32_t priority __rte_unused,
+	       uint32_t priority,
 	       void **meta,
 	       struct rte_flow_error *error)
 {
@@ -914,6 +914,9 @@  ice_acl_parse(struct ice_adapter *ad,
 	uint64_t input_set;
 	int ret;
 
+	if (priority >= 1)
+		return -rte_errno;
+
 	memset(filter, 0, sizeof(*filter));
 	item = ice_search_pattern_match_item(ad, pattern, array, array_len,
 					     error);
diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
index 7ba65b9b04..af9669fac6 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -2194,7 +2194,7 @@  ice_fdir_parse(struct ice_adapter *ad,
 	       uint32_t array_len,
 	       const struct rte_flow_item pattern[],
 	       const struct rte_flow_action actions[],
-	       uint32_t priority __rte_unused,
+	       uint32_t priority,
 	       void **meta,
 	       struct rte_flow_error *error)
 {
@@ -2207,6 +2207,10 @@  ice_fdir_parse(struct ice_adapter *ad,
 	memset(filter, 0, sizeof(*filter));
 	item = ice_search_pattern_match_item(ad, pattern, array, array_len,
 					     error);
+
+	if (!ad->devargs.pipe_mode_support && priority >= 1)
+		return -rte_errno;
+
 	if (!item)
 		return -rte_errno;
 
diff --git a/drivers/net/ice/ice_generic_flow.c b/drivers/net/ice/ice_generic_flow.c
index c2fa75f165..1d557a05f4 100644
--- a/drivers/net/ice/ice_generic_flow.c
+++ b/drivers/net/ice/ice_generic_flow.c
@@ -1923,9 +1923,9 @@  ice_register_parser(struct ice_flow_parser *parser,
 	} else {
 		if (parser->engine->type == ICE_FLOW_ENGINE_SWITCH ||
 				parser->engine->type == ICE_FLOW_ENGINE_HASH)
-			TAILQ_INSERT_TAIL(list, parser_node, node);
-		else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR)
 			TAILQ_INSERT_HEAD(list, parser_node, node);
+		else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR)
+			TAILQ_INSERT_TAIL(list, parser_node, node);
 		else if (parser->engine->type == ICE_FLOW_ENGINE_ACL)
 			TAILQ_INSERT_HEAD(list, parser_node, node);
 		else
diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c
index 54d14dfcdd..175780c9ff 100644
--- a/drivers/net/ice/ice_hash.c
+++ b/drivers/net/ice/ice_hash.c
@@ -1034,7 +1034,7 @@  ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad,
 			uint32_t array_len,
 			const struct rte_flow_item pattern[],
 			const struct rte_flow_action actions[],
-			uint32_t priority __rte_unused,
+			uint32_t priority,
 			void **meta,
 			struct rte_flow_error *error)
 {
@@ -1043,6 +1043,9 @@  ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad,
 	struct ice_rss_meta *rss_meta_ptr;
 	uint64_t phint = ICE_PHINT_NONE;
 
+	if (priority >= 1)
+		return -rte_errno;
+
 	rss_meta_ptr = rte_zmalloc(NULL, sizeof(*rss_meta_ptr), 0);
 	if (!rss_meta_ptr) {
 		rte_flow_error_set(error, EINVAL,
diff --git a/drivers/net/ice/ice_switch_filter.c b/drivers/net/ice/ice_switch_filter.c
index f222cb9cb0..e0243bb9f4 100644
--- a/drivers/net/ice/ice_switch_filter.c
+++ b/drivers/net/ice/ice_switch_filter.c
@@ -31,6 +31,7 @@ 
 #define ICE_PPP_IPV4_PROTO	0x0021
 #define ICE_PPP_IPV6_PROTO	0x0057
 #define ICE_IPV4_PROTO_NVGRE	0x002F
+#define ICE_SW_PRI_BASE 6
 
 #define ICE_SW_INSET_ETHER ( \
 	ICE_INSET_DMAC | ICE_INSET_SMAC | ICE_INSET_ETHERTYPE)
@@ -1572,7 +1573,10 @@  ice_switch_parse_dcf_action(struct ice_dcf_adapter *ad,
 	rule_info->sw_act.src = rule_info->sw_act.vsi_handle;
 	rule_info->sw_act.flag = ICE_FLTR_RX;
 	rule_info->rx = 1;
-	rule_info->priority = 6 - priority;
+	/* 0 denotes lowest priority of recipe and highest priority
+	 * of rte_flow. Change rte_flow priority into recipe priority.
+	 */
+	rule_info->priority = ICE_SW_PRI_BASE - priority;
 
 	return 0;
 }
@@ -1651,7 +1655,10 @@  ice_switch_parse_action(struct ice_pf *pf,
 	rule_info->sw_act.vsi_handle = vsi->idx;
 	rule_info->rx = 1;
 	rule_info->sw_act.src = vsi->idx;
-	rule_info->priority = priority + 5;
+	/* 0 denotes lowest priority of recipe and highest priority
+	 * of rte_flow. Change rte_flow priority into recipe priority.
+	 */
+	rule_info->priority = ICE_SW_PRI_BASE - priority;
 
 	return 0;