[v2] net/iavf: fix QFI fields of GTPU UL and DL for FDIR

Message ID 20210913153402.312779-1-lingyu.liu@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series [v2] net/iavf: fix QFI fields of GTPU UL and DL for FDIR |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-testing fail build patch failure
ci/github-robot: build fail github build: failed
ci/Intel-compilation success Compilation OK
ci/intel-Testing fail Testing issues

Commit Message

Liu, Lingyu Sept. 13, 2021, 3:34 p.m. UTC
  Fix QFI fields matching of GTPU UL/DL for FDIR.

Fixes: 78e8a87f6324 ("net/iavf: fix GTPU UL and DL support for flow director")
Cc: stable@dpdk.org
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Lingyu Liu <lingyu.liu@intel.com>
---
V2:
 * Fix coding style issue
---
 drivers/net/iavf/iavf_fdir.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)
  

Comments

Qi Zhang Sept. 22, 2021, 7:14 a.m. UTC | #1
> -----Original Message-----
> From: Liu, Lingyu <lingyu.liu@intel.com>
> Sent: Monday, September 13, 2021 11:34 PM
> To: dev@dpdk.org; Zhang, Qi Z <qi.z.zhang@intel.com>; Xing, Beilei
> <beilei.xing@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>
> Cc: Liu, Lingyu <lingyu.liu@intel.com>; stable@dpdk.org; Guo, Junfeng
> <junfeng.guo@intel.com>
> Subject: [PATCH v2] net/iavf: fix QFI fields of GTPU UL and DL for FDIR
> 
> Fix QFI fields matching of GTPU UL/DL for FDIR.
> 
> Fixes: 78e8a87f6324 ("net/iavf: fix GTPU UL and DL support for flow director")
> Cc: stable@dpdk.org
> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
> Signed-off-by: Lingyu Liu <lingyu.liu@intel.com>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
  

Patch

diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c
index 32b06044f2..560589a496 100644
--- a/drivers/net/iavf/iavf_fdir.c
+++ b/drivers/net/iavf/iavf_fdir.c
@@ -1171,7 +1171,17 @@  iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,
 			if (gtp_psc_spec && gtp_psc_mask) {
 				if (gtp_psc_mask->qfi == UINT8_MAX) {
 					input_set |= IAVF_INSET_GTPU_QFI;
-					VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_EH, QFI);
+					if (gtp_psc_spec->pdu_type ==
+								IAVF_GTPU_EH_UPLINK)
+						VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
+										 GTPU_UP, QFI);
+					else if (gtp_psc_spec->pdu_type ==
+								IAVF_GTPU_EH_DWLINK)
+						VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
+										 GTPU_DWN, QFI);
+					else
+						VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
+										 GTPU_EH, QFI);
 				}
 
 				rte_memcpy(hdr->buffer, gtp_psc_spec,