From patchwork Mon Sep 6 02:02:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Zhang X-Patchwork-Id: 98002 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 25B27A0C4D; Mon, 6 Sep 2021 04:16:02 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 127E2410FE; Mon, 6 Sep 2021 04:16:02 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id DC896410FE for ; Mon, 6 Sep 2021 04:15:59 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10098"; a="200072182" X-IronPort-AV: E=Sophos;i="5.85,271,1624345200"; d="scan'208";a="200072182" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Sep 2021 19:15:59 -0700 X-IronPort-AV: E=Sophos;i="5.85,271,1624345200"; d="scan'208";a="536351085" Received: from unknown (HELO intel-npg-odc-srv03.cd.intel.com) ([10.240.178.145]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Sep 2021 19:15:54 -0700 From: Robin Zhang To: dev@dpdk.org Cc: beilei.xing@intel.com, qi.z.zhang@intel.com, helin.zhang@intel.com, jingjing.wu@intel.com, remy.horton@intel.com, jijiang.liu@intel.com, jing.d.chen@intel.com, heqing.zhu@intel.com, cunming.liang@intel.com, wenzhuo.lu@intel.com, roy.fan.zhang@intel.com, andrey.chilikin@intel.com, echaudro@redhat.com, junfeng.guo@intel.com, stevex.yang@intel.com, Robin Zhang , Stanislaw Grzeszczak Date: Mon, 6 Sep 2021 02:02:44 +0000 Message-Id: <20210906020258.1291688-5-robinx.zhang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210906020258.1291688-1-robinx.zhang@intel.com> References: <20210618063851.3694702-1-robinx.zhang@intel.com> <20210906020258.1291688-1-robinx.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v4 04/18] net/i40e/base: define new Shadow RAM pointers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add definitions for Shadow RAM pointers: 6th FPA module, 5th FPA module in X722 and Preservation Rules Module. Signed-off-by: Stanislaw Grzeszczak Signed-off-by: Robin Zhang --- drivers/net/i40e/base/i40e_type.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index cf41345834..e5a3729183 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -1555,6 +1555,9 @@ struct i40e_hw_port_stats { #define I40E_SR_FEATURE_CONFIGURATION_PTR 0x49 #define I40E_SR_CONFIGURATION_METADATA_PTR 0x4D #define I40E_SR_IMMEDIATE_VALUES_PTR 0x4E +#define I40E_SR_PRESERVATION_RULES_PTR 0x70 +#define I40E_X722_SR_5TH_FREE_PROVISION_AREA_PTR 0x71 +#define I40E_SR_6TH_FREE_PROVISION_AREA_PTR 0x71 /* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */ #define I40E_SR_VPD_MODULE_MAX_SIZE 1024