diff mbox series

[v4,4/4] app/testpmd: use per-core variable in flowgen

Message ID 20210812131901.25665-5-wangzhihong.wzh@bytedance.com (mailing list archive)
State Superseded, archived
Delegated to: Ferruh Yigit
Headers
Series app/testpmd: flowgen fixes and improvements |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/github-robot: build success github build: passed
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS

Commit Message

王志宏 Aug. 12, 2021, 1:19 p.m. UTC 
  Use per-core variable for flow indexing to solve cache contention in
multi-core scenarios.

v4: use loop local variable to improve performance

Signed-off-by: Zhihong Wang <wangzhihong.wzh@bytedance.com>
---
 app/test-pmd/flowgen.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Li, Xiaoyun Aug. 13, 2021, 1:56 a.m. UTC | #1 
> -----Original Message-----
> From: Zhihong Wang <wangzhihong.wzh@bytedance.com>
> Sent: Thursday, August 12, 2021 21:19
> To: dev@dpdk.org; Yigit, Ferruh <ferruh.yigit@intel.com>; Li, Xiaoyun
> <xiaoyun.li@intel.com>; Singh, Aman Deep <aman.deep.singh@intel.com>;
> irusskikh@marvell.com; cchemparathy@tilera.com
> Cc: Zhihong Wang <wangzhihong.wzh@bytedance.com>
> Subject: [PATCH v4 4/4] app/testpmd: use per-core variable in flowgen
> 
> Use per-core variable for flow indexing to solve cache contention in multi-core
> scenarios.
> 
> v4: use loop local variable to improve performance

Usually, the changes should be after sign-off and "---" not in commit log.

> 
> Signed-off-by: Zhihong Wang <wangzhihong.wzh@bytedance.com>
> ---
>  app/test-pmd/flowgen.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 

Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
王志宏 Aug. 13, 2021, 2:35 a.m. UTC | #2 
On Fri, Aug 13, 2021 at 9:56 AM Li, Xiaoyun <xiaoyun.li@intel.com> wrote:
>
>
> > -----Original Message-----
> > From: Zhihong Wang <wangzhihong.wzh@bytedance.com>
> > Sent: Thursday, August 12, 2021 21:19
> > To: dev@dpdk.org; Yigit, Ferruh <ferruh.yigit@intel.com>; Li, Xiaoyun
> > <xiaoyun.li@intel.com>; Singh, Aman Deep <aman.deep.singh@intel.com>;
> > irusskikh@marvell.com; cchemparathy@tilera.com
> > Cc: Zhihong Wang <wangzhihong.wzh@bytedance.com>
> > Subject: [PATCH v4 4/4] app/testpmd: use per-core variable in flowgen
> >
> > Use per-core variable for flow indexing to solve cache contention in multi-core
> > scenarios.
> >
> > v4: use loop local variable to improve performance
>
> Usually, the changes should be after sign-off and "---" not in commit log.

Ok. I'll wait to see if there's more comments and then send a v5 to
correct these. Thanks.

>
> >
> > Signed-off-by: Zhihong Wang <wangzhihong.wzh@bytedance.com>
> > ---
> >  app/test-pmd/flowgen.c | 6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> >
>
> Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
diff mbox series

Patch

diff --git a/app/test-pmd/flowgen.c b/app/test-pmd/flowgen.c
index 229794ee9c..b541485304 100644
--- a/app/test-pmd/flowgen.c
+++ b/app/test-pmd/flowgen.c
@@ -53,6 +53,8 @@  static struct rte_ether_addr cfg_ether_dst =
 
 #define IP_DEFTTL  64   /* from RFC 1340. */
 
+RTE_DEFINE_PER_LCORE(int, _next_flow);
+
 /*
  * Multi-flow generation mode.
  *
@@ -80,7 +82,7 @@  pkt_burst_flow_gen(struct fwd_stream *fs)
 	uint32_t retry;
 	uint64_t tx_offloads;
 	uint64_t start_tsc = 0;
-	static int next_flow = 0;
+	int next_flow = RTE_PER_LCORE(_next_flow);
 
 	get_start_cycles(&start_tsc);
 
@@ -193,6 +195,8 @@  pkt_burst_flow_gen(struct fwd_stream *fs)
 		} while (++nb_tx < nb_pkt);
 	}
 
+	RTE_PER_LCORE(_next_flow) = next_flow;
+
 	get_end_cycles(fs, start_tsc);
 }