From patchwork Wed Jul 28 02:24:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simei Su X-Patchwork-Id: 96342 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B578FA0C40; Wed, 28 Jul 2021 04:35:25 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3D8C240E64; Wed, 28 Jul 2021 04:35:25 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 7C02E40142 for ; Wed, 28 Jul 2021 04:35:23 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10058"; a="210679492" X-IronPort-AV: E=Sophos;i="5.84,275,1620716400"; d="scan'208";a="210679492" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jul 2021 19:35:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,275,1620716400"; d="scan'208";a="506224269" Received: from unknown (HELO npg-dpdk-cvl-simeisu-118d193.sh.intel.com) ([10.67.119.195]) by FMSMGA003.fm.intel.com with ESMTP; 27 Jul 2021 19:35:17 -0700 From: Simei Su To: qi.z.zhang@intel.com Cc: dev@dpdk.org, xuan.ding@intel.com, wenjun1.wu@intel.com, Simei Su Date: Wed, 28 Jul 2021 10:24:29 +0800 Message-Id: <20210728022429.237010-1-simei.su@intel.com> X-Mailer: git-send-email 2.9.5 Subject: [dpdk-dev] [PATCH] net/ice: fix max entry number for ACL normal priority X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" For ACL, there are three entry priorities: LOW, NORMAL, HIGH. Low priority starts from the highest index, 25% of total entries; Normal priority starts from the highest index, 50% of total entries; High priority starts from the lowest index, 25% of total entries. Each TCAM block has 512 entries of 40 bits. Currently, there is a scenario in which multiple TCAM blocks are cascaded. It means the total entries are 512. The default priority is NORMAL, so the max entry is 256, not 512. This patch changes the max entry number for NORMAL priority. Fixes: 40d466fa9f76 ("net/ice: support ACL filter in DCF") Signed-off-by: Simei Su Acked-by: Qi Zhang --- drivers/net/ice/ice_acl_filter.c | 4 ++-- drivers/net/ice/ice_ethdev.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/ice_acl_filter.c b/drivers/net/ice/ice_acl_filter.c index 3375609..0c15a70 100644 --- a/drivers/net/ice/ice_acl_filter.c +++ b/drivers/net/ice/ice_acl_filter.c @@ -430,7 +430,7 @@ ice_acl_hw_set_conf(struct ice_pf *pf, struct ice_fdir_fltr *input, /* For IPV4_OTHER type, should add entry for all types. * For IPV4_UDP/TCP/SCTP type, only add entry for each. */ - if (slot_id < MAX_ACL_ENTRIES) { + if (slot_id < MAX_ACL_NORMAL_ENTRIES) { entry_id = ((uint64_t)flow_type << 32) | slot_id; ret = ice_flow_add_entry(hw, blk, flow_type, entry_id, pf->main_vsi->idx, @@ -444,7 +444,7 @@ ice_acl_hw_set_conf(struct ice_pf *pf, struct ice_fdir_fltr *input, pf->acl.hw_entry_id[slot_id] = hw_entry; } else { PMD_DRV_LOG(ERR, "Exceed the maximum entry number(%d)" - " HW supported!", MAX_ACL_ENTRIES); + " HW supported!", MAX_ACL_NORMAL_ENTRIES); return -1; } diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h index edafdf1..b4bf651 100644 --- a/drivers/net/ice/ice_ethdev.h +++ b/drivers/net/ice/ice_ethdev.h @@ -50,7 +50,7 @@ #define ICE_PKG_FILE_SEARCH_PATH_UPDATES "/lib/firmware/updates/intel/ice/ddp/" #define ICE_MAX_PKG_FILENAME_SIZE 256 -#define MAX_ACL_ENTRIES 512 +#define MAX_ACL_NORMAL_ENTRIES 256 /** * vlan_id is a 12 bit number. @@ -408,7 +408,7 @@ struct ice_acl_conf { struct ice_acl_info { struct ice_acl_conf conf; struct rte_bitmap *slots; - uint64_t hw_entry_id[MAX_ACL_ENTRIES]; + uint64_t hw_entry_id[MAX_ACL_NORMAL_ENTRIES]; }; struct ice_pf {