event/cnxk: fix reading stale Tx queue depth

Message ID 20210720070432.1649-1-pbhagavatula@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series event/cnxk: fix reading stale Tx queue depth |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/github-robot success github build: passed
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS

Commit Message

Pavan Nikhilesh Bhagavatula July 20, 2021, 7:04 a.m. UTC
  From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Reads to Tx queue FC memory need to be atomic to avoid cores using
same Tx queue spinning on stale values.

Fixes: 313e884a22fd ("event/cnxk: support Tx adapter fast path")

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 Please squash this into next-event tree

 drivers/event/cnxk/cn9k_worker.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

--
2.17.1
  

Comments

Jerin Jacob July 30, 2021, 10:58 a.m. UTC | #1
On Tue, Jul 20, 2021 at 12:35 PM <pbhagavatula@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Reads to Tx queue FC memory need to be atomic to avoid cores using
> same Tx queue spinning on stale values.
>
> Fixes: 313e884a22fd ("event/cnxk: support Tx adapter fast path")
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>

Applied to dpdk-next-net-eventdev/for-main. Thanks
  

Patch

diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h
index cc1e141957..9b2a0bf882 100644
--- a/drivers/event/cnxk/cn9k_worker.h
+++ b/drivers/event/cnxk/cn9k_worker.h
@@ -420,7 +420,8 @@  NIX_RX_FASTPATH_MODES
 static __rte_always_inline void
 cn9k_sso_txq_fc_wait(const struct cn9k_eth_txq *txq)
 {
-	while (!(((txq)->nb_sqb_bufs_adj - *(txq)->fc_mem)
+	while (!((txq->nb_sqb_bufs_adj -
+		  __atomic_load_n(txq->fc_mem, __ATOMIC_RELAXED))
 		 << (txq)->sqes_per_sqb_log2))
 		;
 }