From patchwork Mon Jun 21 15:04:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 94634 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 97F62A0547; Mon, 21 Jun 2021 17:06:11 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1193B411B4; Mon, 21 Jun 2021 17:05:34 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id B627B411F3 for ; Mon, 21 Jun 2021 17:05:31 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15LF5D0f008464; Mon, 21 Jun 2021 08:05:31 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=8+f0fgQUVCJ+ASc1d9R5WyCQsnHxkSBj1orVsRNDbQ8=; b=iZb/mKG+hHvRosj8GKxRdG7F39QJURt4h4kR6oLco2A2LxEdcb88muRoW22a2d+apLs2 g5/bRoSidCTwjJjCEwYyWnze7ecJXEQ4Ibt3uMwSK8FiOX9NR8ZQMZaKYPyeKTSwzXa8 Bp9ZHztySYXU/2lA8scelFjz7F0ZQAaKBd5bdi8yKmNxE1R7BxLyXKzf2M9ul32pz9Tc BM2B4W6K5QLT3vvNCnpj0WvA29MuyIcLIdM/bxL8Rtwz16LHOPyqy/zIe7kGG5s44xUg wFtnx6wK8T1LS/cuxhLhn52g7oEQ5Gg5+1Rrk4J0CCEOmxqYZOXBDZCOSxRMTPIz0gh8 UA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 39aj2xja0p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 21 Jun 2021 08:05:30 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 21 Jun 2021 08:05:29 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 21 Jun 2021 08:05:29 -0700 Received: from EH-LT0048.marvell.com (unknown [10.193.32.52]) by maili.marvell.com (Postfix) with ESMTP id 1D22B3F705B; Mon, 21 Jun 2021 08:05:27 -0700 (PDT) From: Tomasz Duszynski To: Jakub Palider , Tomasz Duszynski CC: , , Jerin Jacob Date: Mon, 21 Jun 2021 17:04:27 +0200 Message-ID: <20210621150449.19070-11-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210621150449.19070-1-tduszynski@marvell.com> References: <20210531214142.30167-1-tduszynski@marvell.com> <20210621150449.19070-1-tduszynski@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: ZE-j9Z4NP8cOiC6_jXrxnxjA48grIKBy X-Proofpoint-ORIG-GUID: ZE-j9Z4NP8cOiC6_jXrxnxjA48grIKBy X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-21_06:2021-06-21, 2021-06-21 signatures=0 Subject: [dpdk-dev] [PATCH v3 10/32] raw/cnxk_bphy: support for reading queue configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for reading queue configuration. Single queue represents a logical mac available on rpm/cgx. Signed-off-by: Tomasz Duszynski Signed-off-by: Jakub Palider Reviewed-by: Jerin Jacob --- drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c index e537888f9..016f9f02c 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c @@ -27,7 +27,27 @@ cnxk_bphy_cgx_format_name(char *name, unsigned int len, pci_dev->addr.devid, pci_dev->addr.function); } +static int +cnxk_bphy_cgx_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id, + rte_rawdev_obj_t queue_conf, + size_t queue_conf_size) +{ + unsigned int *conf; + + RTE_SET_USED(dev); + RTE_SET_USED(queue_id); + + if (queue_conf_size != sizeof(*conf)) + return -EINVAL; + + conf = (unsigned int *)queue_conf; + *conf = 1; + + return 0; +} + static const struct rte_rawdev_ops cnxk_bphy_cgx_rawdev_ops = { + .queue_def_conf = cnxk_bphy_cgx_queue_def_conf, }; static void