@@ -3,7 +3,7 @@
* All rights reserved.
*/
-/* date: Tue Dec 1 11:40:24 2020 */
+/* date: Mon Dec 7 09:51:03 2020 */
#include "ulp_template_db_enum.h"
#include "ulp_template_db_field.h"
@@ -16,1800 +16,571 @@
* maps hash id to ulp_class_match_list[] index
*/
uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
- [BNXT_ULP_CLASS_HID_07e0] = 1,
- [BNXT_ULP_CLASS_HID_01dc] = 2,
- [BNXT_ULP_CLASS_HID_006e] = 3,
- [BNXT_ULP_CLASS_HID_025a] = 4,
- [BNXT_ULP_CLASS_HID_0146] = 5,
- [BNXT_ULP_CLASS_HID_0332] = 6,
- [BNXT_ULP_CLASS_HID_01c4] = 7,
- [BNXT_ULP_CLASS_HID_078a] = 8,
- [BNXT_ULP_CLASS_HID_02ed] = 9,
- [BNXT_ULP_CLASS_HID_04d9] = 10,
- [BNXT_ULP_CLASS_HID_036b] = 11,
- [BNXT_ULP_CLASS_HID_0131] = 12,
- [BNXT_ULP_CLASS_HID_0217] = 13,
- [BNXT_ULP_CLASS_HID_03c3] = 14,
- [BNXT_ULP_CLASS_HID_0295] = 15,
- [BNXT_ULP_CLASS_HID_0441] = 16,
- [BNXT_ULP_CLASS_HID_0095] = 17,
- [BNXT_ULP_CLASS_HID_0241] = 18,
- [BNXT_ULP_CLASS_HID_04ed] = 19,
- [BNXT_ULP_CLASS_HID_06d9] = 20,
- [BNXT_ULP_CLASS_HID_07bf] = 21,
- [BNXT_ULP_CLASS_HID_016b] = 22,
- [BNXT_ULP_CLASS_HID_0417] = 23,
- [BNXT_ULP_CLASS_HID_05c3] = 24,
- [BNXT_ULP_CLASS_HID_0187] = 25,
- [BNXT_ULP_CLASS_HID_0373] = 26,
- [BNXT_ULP_CLASS_HID_0205] = 27,
- [BNXT_ULP_CLASS_HID_03f1] = 28,
- [BNXT_ULP_CLASS_HID_00a1] = 29,
- [BNXT_ULP_CLASS_HID_029d] = 30,
- [BNXT_ULP_CLASS_HID_012f] = 31,
- [BNXT_ULP_CLASS_HID_031b] = 32,
- [BNXT_ULP_CLASS_HID_072f] = 33,
- [BNXT_ULP_CLASS_HID_011b] = 34,
- [BNXT_ULP_CLASS_HID_0387] = 35,
- [BNXT_ULP_CLASS_HID_0573] = 36,
- [BNXT_ULP_CLASS_HID_0649] = 37,
- [BNXT_ULP_CLASS_HID_0005] = 38,
- [BNXT_ULP_CLASS_HID_02a1] = 39,
- [BNXT_ULP_CLASS_HID_049d] = 40,
- [BNXT_ULP_CLASS_HID_01ea] = 41,
- [BNXT_ULP_CLASS_HID_03de] = 42,
- [BNXT_ULP_CLASS_HID_0672] = 43,
- [BNXT_ULP_CLASS_HID_0026] = 44,
- [BNXT_ULP_CLASS_HID_0746] = 45,
- [BNXT_ULP_CLASS_HID_010a] = 46,
- [BNXT_ULP_CLASS_HID_03ae] = 47,
- [BNXT_ULP_CLASS_HID_0592] = 48,
- [BNXT_ULP_CLASS_HID_07d0] = 49,
- [BNXT_ULP_CLASS_HID_01ec] = 50,
- [BNXT_ULP_CLASS_HID_005e] = 51,
- [BNXT_ULP_CLASS_HID_026a] = 52,
- [BNXT_ULP_CLASS_HID_0176] = 53,
- [BNXT_ULP_CLASS_HID_0302] = 54,
- [BNXT_ULP_CLASS_HID_01f4] = 55,
- [BNXT_ULP_CLASS_HID_07ba] = 56,
- [BNXT_ULP_CLASS_HID_06a7] = 57,
- [BNXT_ULP_CLASS_HID_006b] = 58,
- [BNXT_ULP_CLASS_HID_0725] = 59,
- [BNXT_ULP_CLASS_HID_00e9] = 60,
- [BNXT_ULP_CLASS_HID_05d9] = 61,
- [BNXT_ULP_CLASS_HID_078d] = 62,
- [BNXT_ULP_CLASS_HID_065f] = 63,
- [BNXT_ULP_CLASS_HID_0003] = 64,
- [BNXT_ULP_CLASS_HID_045f] = 65,
- [BNXT_ULP_CLASS_HID_0603] = 66,
- [BNXT_ULP_CLASS_HID_00a7] = 67,
- [BNXT_ULP_CLASS_HID_026b] = 68,
- [BNXT_ULP_CLASS_HID_0371] = 69,
- [BNXT_ULP_CLASS_HID_0525] = 70,
- [BNXT_ULP_CLASS_HID_07d9] = 71,
- [BNXT_ULP_CLASS_HID_018d] = 72,
- [BNXT_ULP_CLASS_HID_0177] = 73,
- [BNXT_ULP_CLASS_HID_033b] = 74,
- [BNXT_ULP_CLASS_HID_05df] = 75,
- [BNXT_ULP_CLASS_HID_0783] = 76,
- [BNXT_ULP_CLASS_HID_0069] = 77,
- [BNXT_ULP_CLASS_HID_025d] = 78,
- [BNXT_ULP_CLASS_HID_00ef] = 79,
- [BNXT_ULP_CLASS_HID_06a5] = 80,
- [BNXT_ULP_CLASS_HID_02f1] = 81,
- [BNXT_ULP_CLASS_HID_04a5] = 82,
- [BNXT_ULP_CLASS_HID_0377] = 83,
- [BNXT_ULP_CLASS_HID_053b] = 84,
- [BNXT_ULP_CLASS_HID_0601] = 85,
- [BNXT_ULP_CLASS_HID_03df] = 86,
- [BNXT_ULP_CLASS_HID_0269] = 87,
- [BNXT_ULP_CLASS_HID_045d] = 88,
- [BNXT_ULP_CLASS_HID_02dd] = 89,
- [BNXT_ULP_CLASS_HID_04e9] = 90,
- [BNXT_ULP_CLASS_HID_035b] = 91,
- [BNXT_ULP_CLASS_HID_0101] = 92,
- [BNXT_ULP_CLASS_HID_0227] = 93,
- [BNXT_ULP_CLASS_HID_03f3] = 94,
- [BNXT_ULP_CLASS_HID_02a5] = 95,
- [BNXT_ULP_CLASS_HID_0471] = 96,
- [BNXT_ULP_CLASS_HID_00a5] = 97,
- [BNXT_ULP_CLASS_HID_0271] = 98,
- [BNXT_ULP_CLASS_HID_04dd] = 99,
- [BNXT_ULP_CLASS_HID_06e9] = 100,
- [BNXT_ULP_CLASS_HID_078f] = 101,
- [BNXT_ULP_CLASS_HID_015b] = 102,
- [BNXT_ULP_CLASS_HID_0427] = 103,
- [BNXT_ULP_CLASS_HID_05f3] = 104,
- [BNXT_ULP_CLASS_HID_01b7] = 105,
- [BNXT_ULP_CLASS_HID_0343] = 106,
- [BNXT_ULP_CLASS_HID_0235] = 107,
- [BNXT_ULP_CLASS_HID_03c1] = 108,
- [BNXT_ULP_CLASS_HID_0091] = 109,
- [BNXT_ULP_CLASS_HID_02ad] = 110,
- [BNXT_ULP_CLASS_HID_011f] = 111,
- [BNXT_ULP_CLASS_HID_032b] = 112,
- [BNXT_ULP_CLASS_HID_071f] = 113,
- [BNXT_ULP_CLASS_HID_012b] = 114,
- [BNXT_ULP_CLASS_HID_03b7] = 115,
- [BNXT_ULP_CLASS_HID_0543] = 116,
- [BNXT_ULP_CLASS_HID_0679] = 117,
- [BNXT_ULP_CLASS_HID_0035] = 118,
- [BNXT_ULP_CLASS_HID_0291] = 119,
- [BNXT_ULP_CLASS_HID_04ad] = 120,
- [BNXT_ULP_CLASS_HID_01da] = 121,
- [BNXT_ULP_CLASS_HID_03ee] = 122,
- [BNXT_ULP_CLASS_HID_0642] = 123,
- [BNXT_ULP_CLASS_HID_0016] = 124,
- [BNXT_ULP_CLASS_HID_0776] = 125,
- [BNXT_ULP_CLASS_HID_013a] = 126,
- [BNXT_ULP_CLASS_HID_039e] = 127,
- [BNXT_ULP_CLASS_HID_05a2] = 128,
- [BNXT_ULP_CLASS_HID_0697] = 129,
- [BNXT_ULP_CLASS_HID_005b] = 130,
- [BNXT_ULP_CLASS_HID_0715] = 131,
- [BNXT_ULP_CLASS_HID_00d9] = 132,
- [BNXT_ULP_CLASS_HID_05e9] = 133,
- [BNXT_ULP_CLASS_HID_07bd] = 134,
- [BNXT_ULP_CLASS_HID_066f] = 135,
- [BNXT_ULP_CLASS_HID_0033] = 136,
- [BNXT_ULP_CLASS_HID_046f] = 137,
- [BNXT_ULP_CLASS_HID_0633] = 138,
- [BNXT_ULP_CLASS_HID_0097] = 139,
- [BNXT_ULP_CLASS_HID_025b] = 140,
- [BNXT_ULP_CLASS_HID_0341] = 141,
- [BNXT_ULP_CLASS_HID_0515] = 142,
- [BNXT_ULP_CLASS_HID_07e9] = 143,
- [BNXT_ULP_CLASS_HID_01bd] = 144,
- [BNXT_ULP_CLASS_HID_0147] = 145,
- [BNXT_ULP_CLASS_HID_030b] = 146,
- [BNXT_ULP_CLASS_HID_05ef] = 147,
- [BNXT_ULP_CLASS_HID_07b3] = 148,
- [BNXT_ULP_CLASS_HID_0059] = 149,
- [BNXT_ULP_CLASS_HID_026d] = 150,
- [BNXT_ULP_CLASS_HID_00df] = 151,
- [BNXT_ULP_CLASS_HID_0695] = 152,
- [BNXT_ULP_CLASS_HID_02c1] = 153,
- [BNXT_ULP_CLASS_HID_0495] = 154,
- [BNXT_ULP_CLASS_HID_0347] = 155,
- [BNXT_ULP_CLASS_HID_050b] = 156,
- [BNXT_ULP_CLASS_HID_0631] = 157,
- [BNXT_ULP_CLASS_HID_03ef] = 158,
- [BNXT_ULP_CLASS_HID_0259] = 159,
- [BNXT_ULP_CLASS_HID_046d] = 160
+ [BNXT_ULP_CLASS_HID_005c] = 1,
+ [BNXT_ULP_CLASS_HID_0003] = 2,
+ [BNXT_ULP_CLASS_HID_0132] = 3,
+ [BNXT_ULP_CLASS_HID_00e1] = 4,
+ [BNXT_ULP_CLASS_HID_0044] = 5,
+ [BNXT_ULP_CLASS_HID_001b] = 6,
+ [BNXT_ULP_CLASS_HID_012a] = 7,
+ [BNXT_ULP_CLASS_HID_00f9] = 8,
+ [BNXT_ULP_CLASS_HID_018d] = 9,
+ [BNXT_ULP_CLASS_HID_00a7] = 10,
+ [BNXT_ULP_CLASS_HID_006f] = 11,
+ [BNXT_ULP_CLASS_HID_0181] = 12,
+ [BNXT_ULP_CLASS_HID_0195] = 13,
+ [BNXT_ULP_CLASS_HID_00bf] = 14,
+ [BNXT_ULP_CLASS_HID_0077] = 15,
+ [BNXT_ULP_CLASS_HID_0199] = 16,
+ [BNXT_ULP_CLASS_HID_009a] = 17,
+ [BNXT_ULP_CLASS_HID_0192] = 18,
+ [BNXT_ULP_CLASS_HID_01e2] = 19,
+ [BNXT_ULP_CLASS_HID_00fa] = 20,
+ [BNXT_ULP_CLASS_HID_0165] = 21,
+ [BNXT_ULP_CLASS_HID_0042] = 22,
+ [BNXT_ULP_CLASS_HID_00cd] = 23,
+ [BNXT_ULP_CLASS_HID_01aa] = 24,
+ [BNXT_ULP_CLASS_HID_0178] = 25,
+ [BNXT_ULP_CLASS_HID_0070] = 26,
+ [BNXT_ULP_CLASS_HID_00f3] = 27,
+ [BNXT_ULP_CLASS_HID_01d8] = 28,
+ [BNXT_ULP_CLASS_HID_005b] = 29,
+ [BNXT_ULP_CLASS_HID_0153] = 30,
+ [BNXT_ULP_CLASS_HID_01a3] = 31,
+ [BNXT_ULP_CLASS_HID_00bb] = 32,
+ [BNXT_ULP_CLASS_HID_0082] = 33,
+ [BNXT_ULP_CLASS_HID_018a] = 34,
+ [BNXT_ULP_CLASS_HID_01fa] = 35,
+ [BNXT_ULP_CLASS_HID_00e2] = 36,
+ [BNXT_ULP_CLASS_HID_017d] = 37,
+ [BNXT_ULP_CLASS_HID_005a] = 38,
+ [BNXT_ULP_CLASS_HID_00d5] = 39,
+ [BNXT_ULP_CLASS_HID_01b2] = 40,
+ [BNXT_ULP_CLASS_HID_0160] = 41,
+ [BNXT_ULP_CLASS_HID_0068] = 42,
+ [BNXT_ULP_CLASS_HID_00eb] = 43,
+ [BNXT_ULP_CLASS_HID_01c0] = 44,
+ [BNXT_ULP_CLASS_HID_0043] = 45,
+ [BNXT_ULP_CLASS_HID_014b] = 46,
+ [BNXT_ULP_CLASS_HID_01bb] = 47,
+ [BNXT_ULP_CLASS_HID_00a3] = 48,
+ [BNXT_ULP_CLASS_HID_00cb] = 49,
+ [BNXT_ULP_CLASS_HID_00b4] = 50,
+ [BNXT_ULP_CLASS_HID_0013] = 51,
+ [BNXT_ULP_CLASS_HID_001c] = 52,
+ [BNXT_ULP_CLASS_HID_017b] = 53,
+ [BNXT_ULP_CLASS_HID_0164] = 54,
+ [BNXT_ULP_CLASS_HID_00c3] = 55,
+ [BNXT_ULP_CLASS_HID_00cc] = 56,
+ [BNXT_ULP_CLASS_HID_01a5] = 57,
+ [BNXT_ULP_CLASS_HID_0196] = 58,
+ [BNXT_ULP_CLASS_HID_010d] = 59,
+ [BNXT_ULP_CLASS_HID_00fe] = 60,
+ [BNXT_ULP_CLASS_HID_0084] = 61,
+ [BNXT_ULP_CLASS_HID_0046] = 62,
+ [BNXT_ULP_CLASS_HID_01ec] = 63,
+ [BNXT_ULP_CLASS_HID_01ae] = 64,
+ [BNXT_ULP_CLASS_HID_00d3] = 65,
+ [BNXT_ULP_CLASS_HID_00ac] = 66,
+ [BNXT_ULP_CLASS_HID_000b] = 67,
+ [BNXT_ULP_CLASS_HID_0004] = 68,
+ [BNXT_ULP_CLASS_HID_0163] = 69,
+ [BNXT_ULP_CLASS_HID_017c] = 70,
+ [BNXT_ULP_CLASS_HID_00db] = 71,
+ [BNXT_ULP_CLASS_HID_00d4] = 72,
+ [BNXT_ULP_CLASS_HID_01bd] = 73,
+ [BNXT_ULP_CLASS_HID_018e] = 74,
+ [BNXT_ULP_CLASS_HID_0115] = 75,
+ [BNXT_ULP_CLASS_HID_00e6] = 76,
+ [BNXT_ULP_CLASS_HID_009c] = 77,
+ [BNXT_ULP_CLASS_HID_005e] = 78,
+ [BNXT_ULP_CLASS_HID_01f4] = 79,
+ [BNXT_ULP_CLASS_HID_01b6] = 80
};
/* Array for the proto matcher list */
struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
[1] = {
- .class_hid = BNXT_ULP_CLASS_HID_07e0,
+ .class_hid = BNXT_ULP_CLASS_HID_005c,
.class_tid = 1,
.hdr_sig_id = 0,
.flow_sig_id = 0,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[2] = {
- .class_hid = BNXT_ULP_CLASS_HID_01dc,
+ .class_hid = BNXT_ULP_CLASS_HID_0003,
.class_tid = 1,
.hdr_sig_id = 0,
.flow_sig_id = 1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[3] = {
- .class_hid = BNXT_ULP_CLASS_HID_006e,
+ .class_hid = BNXT_ULP_CLASS_HID_0132,
.class_tid = 1,
.hdr_sig_id = 0,
- .flow_sig_id = 2,
+ .flow_sig_id = 1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[4] = {
- .class_hid = BNXT_ULP_CLASS_HID_025a,
+ .class_hid = BNXT_ULP_CLASS_HID_00e1,
.class_tid = 1,
.hdr_sig_id = 0,
- .flow_sig_id = 2,
+ .flow_sig_id = 1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[5] = {
- .class_hid = BNXT_ULP_CLASS_HID_0146,
+ .class_hid = BNXT_ULP_CLASS_HID_0044,
.class_tid = 1,
- .hdr_sig_id = 0,
- .flow_sig_id = 2,
+ .hdr_sig_id = 1,
+ .flow_sig_id = 1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[6] = {
- .class_hid = BNXT_ULP_CLASS_HID_0332,
+ .class_hid = BNXT_ULP_CLASS_HID_001b,
.class_tid = 1,
- .hdr_sig_id = 0,
+ .hdr_sig_id = 1,
.flow_sig_id = 2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[7] = {
- .class_hid = BNXT_ULP_CLASS_HID_01c4,
+ .class_hid = BNXT_ULP_CLASS_HID_012a,
.class_tid = 1,
- .hdr_sig_id = 0,
+ .hdr_sig_id = 1,
.flow_sig_id = 2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[8] = {
- .class_hid = BNXT_ULP_CLASS_HID_078a,
+ .class_hid = BNXT_ULP_CLASS_HID_00f9,
.class_tid = 1,
- .hdr_sig_id = 0,
+ .hdr_sig_id = 1,
.flow_sig_id = 2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[9] = {
- .class_hid = BNXT_ULP_CLASS_HID_02ed,
+ .class_hid = BNXT_ULP_CLASS_HID_018d,
.class_tid = 1,
- .hdr_sig_id = 1,
+ .hdr_sig_id = 2,
.flow_sig_id = 2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[10] = {
- .class_hid = BNXT_ULP_CLASS_HID_04d9,
+ .class_hid = BNXT_ULP_CLASS_HID_00a7,
.class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 2,
+ .hdr_sig_id = 2,
+ .flow_sig_id = 3,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[11] = {
- .class_hid = BNXT_ULP_CLASS_HID_036b,
+ .class_hid = BNXT_ULP_CLASS_HID_006f,
.class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 2,
+ .hdr_sig_id = 2,
+ .flow_sig_id = 3,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[12] = {
- .class_hid = BNXT_ULP_CLASS_HID_0131,
+ .class_hid = BNXT_ULP_CLASS_HID_0181,
.class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 2,
+ .hdr_sig_id = 2,
+ .flow_sig_id = 3,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[13] = {
- .class_hid = BNXT_ULP_CLASS_HID_0217,
+ .class_hid = BNXT_ULP_CLASS_HID_0195,
.class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 2,
+ .hdr_sig_id = 3,
+ .flow_sig_id = 3,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[14] = {
- .class_hid = BNXT_ULP_CLASS_HID_03c3,
+ .class_hid = BNXT_ULP_CLASS_HID_00bf,
.class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 3,
+ .hdr_sig_id = 3,
+ .flow_sig_id = 4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[15] = {
- .class_hid = BNXT_ULP_CLASS_HID_0295,
+ .class_hid = BNXT_ULP_CLASS_HID_0077,
.class_tid = 1,
- .hdr_sig_id = 1,
+ .hdr_sig_id = 3,
.flow_sig_id = 4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[16] = {
- .class_hid = BNXT_ULP_CLASS_HID_0441,
+ .class_hid = BNXT_ULP_CLASS_HID_0199,
.class_tid = 1,
- .hdr_sig_id = 1,
+ .hdr_sig_id = 3,
.flow_sig_id = 4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[17] = {
- .class_hid = BNXT_ULP_CLASS_HID_0095,
+ .class_hid = BNXT_ULP_CLASS_HID_009a,
.class_tid = 1,
- .hdr_sig_id = 1,
+ .hdr_sig_id = 4,
.flow_sig_id = 4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[18] = {
- .class_hid = BNXT_ULP_CLASS_HID_0241,
+ .class_hid = BNXT_ULP_CLASS_HID_0192,
.class_tid = 1,
- .hdr_sig_id = 1,
+ .hdr_sig_id = 4,
.flow_sig_id = 4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[19] = {
- .class_hid = BNXT_ULP_CLASS_HID_04ed,
+ .class_hid = BNXT_ULP_CLASS_HID_01e2,
.class_tid = 1,
- .hdr_sig_id = 1,
+ .hdr_sig_id = 4,
.flow_sig_id = 4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[20] = {
- .class_hid = BNXT_ULP_CLASS_HID_06d9,
+ .class_hid = BNXT_ULP_CLASS_HID_00fa,
.class_tid = 1,
- .hdr_sig_id = 1,
+ .hdr_sig_id = 4,
.flow_sig_id = 4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[21] = {
- .class_hid = BNXT_ULP_CLASS_HID_07bf,
+ .class_hid = BNXT_ULP_CLASS_HID_0165,
.class_tid = 1,
- .hdr_sig_id = 1,
+ .hdr_sig_id = 4,
.flow_sig_id = 4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[22] = {
- .class_hid = BNXT_ULP_CLASS_HID_016b,
+ .class_hid = BNXT_ULP_CLASS_HID_0042,
.class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
+ .hdr_sig_id = 4,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[23] = {
- .class_hid = BNXT_ULP_CLASS_HID_0417,
+ .class_hid = BNXT_ULP_CLASS_HID_00cd,
.class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
+ .hdr_sig_id = 4,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
[24] = {
- .class_hid = BNXT_ULP_CLASS_HID_05c3,
+ .class_hid = BNXT_ULP_CLASS_HID_01aa,
.class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
+ .hdr_sig_id = 4,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [25] = {
- .class_hid = BNXT_ULP_CLASS_HID_0187,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [26] = {
- .class_hid = BNXT_ULP_CLASS_HID_0373,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [27] = {
- .class_hid = BNXT_ULP_CLASS_HID_0205,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [28] = {
- .class_hid = BNXT_ULP_CLASS_HID_03f1,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [29] = {
- .class_hid = BNXT_ULP_CLASS_HID_00a1,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [30] = {
- .class_hid = BNXT_ULP_CLASS_HID_029d,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [31] = {
- .class_hid = BNXT_ULP_CLASS_HID_012f,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [32] = {
- .class_hid = BNXT_ULP_CLASS_HID_031b,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [33] = {
- .class_hid = BNXT_ULP_CLASS_HID_072f,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [34] = {
- .class_hid = BNXT_ULP_CLASS_HID_011b,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [35] = {
- .class_hid = BNXT_ULP_CLASS_HID_0387,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [36] = {
- .class_hid = BNXT_ULP_CLASS_HID_0573,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [37] = {
- .class_hid = BNXT_ULP_CLASS_HID_0649,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [38] = {
- .class_hid = BNXT_ULP_CLASS_HID_0005,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [39] = {
- .class_hid = BNXT_ULP_CLASS_HID_02a1,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [40] = {
- .class_hid = BNXT_ULP_CLASS_HID_049d,
- .class_tid = 1,
- .hdr_sig_id = 1,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [41] = {
- .class_hid = BNXT_ULP_CLASS_HID_01ea,
- .class_tid = 1,
- .hdr_sig_id = 2,
- .flow_sig_id = 4,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [42] = {
- .class_hid = BNXT_ULP_CLASS_HID_03de,
- .class_tid = 1,
- .hdr_sig_id = 2,
- .flow_sig_id = 5,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [43] = {
- .class_hid = BNXT_ULP_CLASS_HID_0672,
- .class_tid = 1,
- .hdr_sig_id = 2,
- .flow_sig_id = 6,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [44] = {
- .class_hid = BNXT_ULP_CLASS_HID_0026,
- .class_tid = 1,
- .hdr_sig_id = 2,
- .flow_sig_id = 6,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [45] = {
- .class_hid = BNXT_ULP_CLASS_HID_0746,
- .class_tid = 1,
- .hdr_sig_id = 2,
- .flow_sig_id = 6,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [46] = {
- .class_hid = BNXT_ULP_CLASS_HID_010a,
- .class_tid = 1,
- .hdr_sig_id = 2,
- .flow_sig_id = 6,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [47] = {
- .class_hid = BNXT_ULP_CLASS_HID_03ae,
- .class_tid = 1,
- .hdr_sig_id = 2,
- .flow_sig_id = 6,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [48] = {
- .class_hid = BNXT_ULP_CLASS_HID_0592,
- .class_tid = 1,
- .hdr_sig_id = 2,
- .flow_sig_id = 6,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [49] = {
- .class_hid = BNXT_ULP_CLASS_HID_07d0,
- .class_tid = 1,
- .hdr_sig_id = 3,
- .flow_sig_id = 6,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [50] = {
- .class_hid = BNXT_ULP_CLASS_HID_01ec,
- .class_tid = 1,
- .hdr_sig_id = 3,
- .flow_sig_id = 7,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [51] = {
- .class_hid = BNXT_ULP_CLASS_HID_005e,
- .class_tid = 1,
- .hdr_sig_id = 3,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [52] = {
- .class_hid = BNXT_ULP_CLASS_HID_026a,
- .class_tid = 1,
- .hdr_sig_id = 3,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [53] = {
- .class_hid = BNXT_ULP_CLASS_HID_0176,
- .class_tid = 1,
- .hdr_sig_id = 3,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [54] = {
- .class_hid = BNXT_ULP_CLASS_HID_0302,
- .class_tid = 1,
- .hdr_sig_id = 3,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [55] = {
- .class_hid = BNXT_ULP_CLASS_HID_01f4,
- .class_tid = 1,
- .hdr_sig_id = 3,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [56] = {
- .class_hid = BNXT_ULP_CLASS_HID_07ba,
- .class_tid = 1,
- .hdr_sig_id = 3,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_3_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_3_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [57] = {
- .class_hid = BNXT_ULP_CLASS_HID_06a7,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [58] = {
- .class_hid = BNXT_ULP_CLASS_HID_006b,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [59] = {
- .class_hid = BNXT_ULP_CLASS_HID_0725,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [60] = {
- .class_hid = BNXT_ULP_CLASS_HID_00e9,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [61] = {
- .class_hid = BNXT_ULP_CLASS_HID_05d9,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 8,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [62] = {
- .class_hid = BNXT_ULP_CLASS_HID_078d,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 9,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [63] = {
- .class_hid = BNXT_ULP_CLASS_HID_065f,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [64] = {
- .class_hid = BNXT_ULP_CLASS_HID_0003,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [65] = {
- .class_hid = BNXT_ULP_CLASS_HID_045f,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [66] = {
- .class_hid = BNXT_ULP_CLASS_HID_0603,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [67] = {
- .class_hid = BNXT_ULP_CLASS_HID_00a7,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [68] = {
- .class_hid = BNXT_ULP_CLASS_HID_026b,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [69] = {
- .class_hid = BNXT_ULP_CLASS_HID_0371,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [70] = {
- .class_hid = BNXT_ULP_CLASS_HID_0525,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [71] = {
- .class_hid = BNXT_ULP_CLASS_HID_07d9,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [72] = {
- .class_hid = BNXT_ULP_CLASS_HID_018d,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [73] = {
- .class_hid = BNXT_ULP_CLASS_HID_0177,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [74] = {
- .class_hid = BNXT_ULP_CLASS_HID_033b,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [75] = {
- .class_hid = BNXT_ULP_CLASS_HID_05df,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [76] = {
- .class_hid = BNXT_ULP_CLASS_HID_0783,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [77] = {
- .class_hid = BNXT_ULP_CLASS_HID_0069,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [78] = {
- .class_hid = BNXT_ULP_CLASS_HID_025d,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [79] = {
- .class_hid = BNXT_ULP_CLASS_HID_00ef,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [80] = {
- .class_hid = BNXT_ULP_CLASS_HID_06a5,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [81] = {
- .class_hid = BNXT_ULP_CLASS_HID_02f1,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [82] = {
- .class_hid = BNXT_ULP_CLASS_HID_04a5,
- .class_tid = 1,
- .hdr_sig_id = 4,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [83] = {
- .class_hid = BNXT_ULP_CLASS_HID_0377,
+ [25] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0178,
.class_tid = 1,
.hdr_sig_id = 4,
- .flow_sig_id = 10,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
@@ -1817,8 +588,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
@@ -1826,11 +596,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [84] = {
- .class_hid = BNXT_ULP_CLASS_HID_053b,
+ [26] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0070,
.class_tid = 1,
.hdr_sig_id = 4,
- .flow_sig_id = 10,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
@@ -1839,20 +609,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [85] = {
- .class_hid = BNXT_ULP_CLASS_HID_0601,
+ [27] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00f3,
.class_tid = 1,
.hdr_sig_id = 4,
- .flow_sig_id = 10,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
@@ -1860,7 +627,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
@@ -1869,11 +636,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [86] = {
- .class_hid = BNXT_ULP_CLASS_HID_03df,
+ [28] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01d8,
.class_tid = 1,
.hdr_sig_id = 4,
- .flow_sig_id = 10,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
@@ -1882,20 +649,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [87] = {
- .class_hid = BNXT_ULP_CLASS_HID_0269,
+ [29] = {
+ .class_hid = BNXT_ULP_CLASS_HID_005b,
.class_tid = 1,
.hdr_sig_id = 4,
- .flow_sig_id = 10,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
@@ -1903,9 +668,8 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
@@ -1913,11 +677,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [88] = {
- .class_hid = BNXT_ULP_CLASS_HID_045d,
+ [30] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0153,
.class_tid = 1,
.hdr_sig_id = 4,
- .flow_sig_id = 10,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
@@ -1926,1472 +690,1060 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_4_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [89] = {
- .class_hid = BNXT_ULP_CLASS_HID_02dd,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [90] = {
- .class_hid = BNXT_ULP_CLASS_HID_04e9,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [91] = {
- .class_hid = BNXT_ULP_CLASS_HID_035b,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [92] = {
- .class_hid = BNXT_ULP_CLASS_HID_0101,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [93] = {
- .class_hid = BNXT_ULP_CLASS_HID_0227,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 10,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [94] = {
- .class_hid = BNXT_ULP_CLASS_HID_03f3,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 11,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [95] = {
- .class_hid = BNXT_ULP_CLASS_HID_02a5,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 12,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [96] = {
- .class_hid = BNXT_ULP_CLASS_HID_0471,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 12,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [97] = {
- .class_hid = BNXT_ULP_CLASS_HID_00a5,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 12,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [98] = {
- .class_hid = BNXT_ULP_CLASS_HID_0271,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 12,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [99] = {
- .class_hid = BNXT_ULP_CLASS_HID_04dd,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 12,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [100] = {
- .class_hid = BNXT_ULP_CLASS_HID_06e9,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 12,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [101] = {
- .class_hid = BNXT_ULP_CLASS_HID_078f,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 12,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [102] = {
- .class_hid = BNXT_ULP_CLASS_HID_015b,
- .class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 12,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [103] = {
- .class_hid = BNXT_ULP_CLASS_HID_0427,
+ [31] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01a3,
.class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .hdr_sig_id = 4,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [104] = {
- .class_hid = BNXT_ULP_CLASS_HID_05f3,
+ [32] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00bb,
.class_tid = 1,
- .hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .hdr_sig_id = 4,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_4_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_4_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [105] = {
- .class_hid = BNXT_ULP_CLASS_HID_01b7,
+ [33] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0082,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [106] = {
- .class_hid = BNXT_ULP_CLASS_HID_0343,
+ [34] = {
+ .class_hid = BNXT_ULP_CLASS_HID_018a,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [107] = {
- .class_hid = BNXT_ULP_CLASS_HID_0235,
+ [35] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01fa,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [108] = {
- .class_hid = BNXT_ULP_CLASS_HID_03c1,
+ [36] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00e2,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [109] = {
- .class_hid = BNXT_ULP_CLASS_HID_0091,
+ [37] = {
+ .class_hid = BNXT_ULP_CLASS_HID_017d,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [110] = {
- .class_hid = BNXT_ULP_CLASS_HID_02ad,
+ [38] = {
+ .class_hid = BNXT_ULP_CLASS_HID_005a,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [111] = {
- .class_hid = BNXT_ULP_CLASS_HID_011f,
+ [39] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00d5,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [112] = {
- .class_hid = BNXT_ULP_CLASS_HID_032b,
+ [40] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01b2,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [113] = {
- .class_hid = BNXT_ULP_CLASS_HID_071f,
+ [41] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0160,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [114] = {
- .class_hid = BNXT_ULP_CLASS_HID_012b,
+ [42] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0068,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [115] = {
- .class_hid = BNXT_ULP_CLASS_HID_03b7,
+ [43] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00eb,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [116] = {
- .class_hid = BNXT_ULP_CLASS_HID_0543,
+ [44] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01c0,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [117] = {
- .class_hid = BNXT_ULP_CLASS_HID_0679,
+ [45] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0043,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [118] = {
- .class_hid = BNXT_ULP_CLASS_HID_0035,
+ [46] = {
+ .class_hid = BNXT_ULP_CLASS_HID_014b,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [119] = {
- .class_hid = BNXT_ULP_CLASS_HID_0291,
+ [47] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01bb,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [120] = {
- .class_hid = BNXT_ULP_CLASS_HID_04ad,
+ [48] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00a3,
.class_tid = 1,
.hdr_sig_id = 5,
- .flow_sig_id = 12,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_5_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_5_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [121] = {
- .class_hid = BNXT_ULP_CLASS_HID_01da,
- .class_tid = 1,
- .hdr_sig_id = 6,
- .flow_sig_id = 12,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [122] = {
- .class_hid = BNXT_ULP_CLASS_HID_03ee,
+ [49] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00cb,
.class_tid = 1,
.hdr_sig_id = 6,
- .flow_sig_id = 13,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [123] = {
- .class_hid = BNXT_ULP_CLASS_HID_0642,
- .class_tid = 1,
- .hdr_sig_id = 6,
- .flow_sig_id = 14,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [124] = {
- .class_hid = BNXT_ULP_CLASS_HID_0016,
+ [50] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00b4,
.class_tid = 1,
.hdr_sig_id = 6,
- .flow_sig_id = 14,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [125] = {
- .class_hid = BNXT_ULP_CLASS_HID_0776,
- .class_tid = 1,
- .hdr_sig_id = 6,
- .flow_sig_id = 14,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [126] = {
- .class_hid = BNXT_ULP_CLASS_HID_013a,
+ [51] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0013,
.class_tid = 1,
.hdr_sig_id = 6,
- .flow_sig_id = 14,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [127] = {
- .class_hid = BNXT_ULP_CLASS_HID_039e,
- .class_tid = 1,
- .hdr_sig_id = 6,
- .flow_sig_id = 14,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [128] = {
- .class_hid = BNXT_ULP_CLASS_HID_05a2,
+ [52] = {
+ .class_hid = BNXT_ULP_CLASS_HID_001c,
.class_tid = 1,
.hdr_sig_id = 6,
- .flow_sig_id = 14,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_OO_VLAN |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [129] = {
- .class_hid = BNXT_ULP_CLASS_HID_0697,
- .class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 14,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [130] = {
- .class_hid = BNXT_ULP_CLASS_HID_005b,
- .class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 14,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [131] = {
- .class_hid = BNXT_ULP_CLASS_HID_0715,
- .class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 14,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [132] = {
- .class_hid = BNXT_ULP_CLASS_HID_00d9,
- .class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 14,
- .hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- },
- [133] = {
- .class_hid = BNXT_ULP_CLASS_HID_05e9,
+ [53] = {
+ .class_hid = BNXT_ULP_CLASS_HID_017b,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 14,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [134] = {
- .class_hid = BNXT_ULP_CLASS_HID_07bd,
+ [54] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0164,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 15,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [135] = {
- .class_hid = BNXT_ULP_CLASS_HID_066f,
+ [55] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00c3,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [136] = {
- .class_hid = BNXT_ULP_CLASS_HID_0033,
+ [56] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00cc,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [137] = {
- .class_hid = BNXT_ULP_CLASS_HID_046f,
+ [57] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01a5,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [138] = {
- .class_hid = BNXT_ULP_CLASS_HID_0633,
+ [58] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0196,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [139] = {
- .class_hid = BNXT_ULP_CLASS_HID_0097,
+ [59] = {
+ .class_hid = BNXT_ULP_CLASS_HID_010d,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [140] = {
- .class_hid = BNXT_ULP_CLASS_HID_025b,
+ [60] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00fe,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [141] = {
- .class_hid = BNXT_ULP_CLASS_HID_0341,
+ [61] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0084,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [142] = {
- .class_hid = BNXT_ULP_CLASS_HID_0515,
+ [62] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0046,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [143] = {
- .class_hid = BNXT_ULP_CLASS_HID_07e9,
+ [63] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01ec,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [144] = {
- .class_hid = BNXT_ULP_CLASS_HID_01bd,
+ [64] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01ae,
.class_tid = 1,
- .hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .hdr_sig_id = 6,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [145] = {
- .class_hid = BNXT_ULP_CLASS_HID_0147,
+ [65] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00d3,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [146] = {
- .class_hid = BNXT_ULP_CLASS_HID_030b,
+ [66] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00ac,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [147] = {
- .class_hid = BNXT_ULP_CLASS_HID_05ef,
+ [67] = {
+ .class_hid = BNXT_ULP_CLASS_HID_000b,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [148] = {
- .class_hid = BNXT_ULP_CLASS_HID_07b3,
+ [68] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0004,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [149] = {
- .class_hid = BNXT_ULP_CLASS_HID_0059,
+ [69] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0163,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [150] = {
- .class_hid = BNXT_ULP_CLASS_HID_026d,
+ [70] = {
+ .class_hid = BNXT_ULP_CLASS_HID_017c,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [151] = {
- .class_hid = BNXT_ULP_CLASS_HID_00df,
+ [71] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00db,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [152] = {
- .class_hid = BNXT_ULP_CLASS_HID_0695,
+ [72] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00d4,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [153] = {
- .class_hid = BNXT_ULP_CLASS_HID_02c1,
+ [73] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01bd,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [154] = {
- .class_hid = BNXT_ULP_CLASS_HID_0495,
+ [74] = {
+ .class_hid = BNXT_ULP_CLASS_HID_018e,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [155] = {
- .class_hid = BNXT_ULP_CLASS_HID_0347,
+ [75] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0115,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [156] = {
- .class_hid = BNXT_ULP_CLASS_HID_050b,
+ [76] = {
+ .class_hid = BNXT_ULP_CLASS_HID_00e6,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [157] = {
- .class_hid = BNXT_ULP_CLASS_HID_0631,
+ [77] = {
+ .class_hid = BNXT_ULP_CLASS_HID_009c,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [158] = {
- .class_hid = BNXT_ULP_CLASS_HID_03ef,
+ [78] = {
+ .class_hid = BNXT_ULP_CLASS_HID_005e,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
- BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [159] = {
- .class_hid = BNXT_ULP_CLASS_HID_0259,
+ [79] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01f4,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
},
- [160] = {
- .class_hid = BNXT_ULP_CLASS_HID_046d,
+ [80] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01b6,
.class_tid = 1,
.hdr_sig_id = 7,
- .flow_sig_id = 16,
+ .flow_sig_id = 8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_OO_VLAN |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF1_7_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF1_7_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID |
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR |
BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
@@ -3,22 +3,22 @@
* All rights reserved.
*/
-/* date: Tue Dec 1 10:17:11 2020 */
+/* date: Fri Dec 4 18:49:44 2020 */
#ifndef ULP_TEMPLATE_DB_H_
#define ULP_TEMPLATE_DB_H_
-#define BNXT_ULP_REGFILE_MAX_SZ 31
+#define BNXT_ULP_REGFILE_MAX_SZ 32
#define BNXT_ULP_MAX_NUM_DEVICES 4
#define BNXT_ULP_LOG2_MAX_NUM_DEV 2
#define BNXT_ULP_GEN_TBL_MAX_SZ 6
-#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 2048
-#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 161
-#define BNXT_ULP_CLASS_HID_LOW_PRIME 7669
+#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 512
+#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 81
+#define BNXT_ULP_CLASS_HID_LOW_PRIME 4049
#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7919
-#define BNXT_ULP_CLASS_HID_SHFTR 24
+#define BNXT_ULP_CLASS_HID_SHFTR 25
#define BNXT_ULP_CLASS_HID_SHFTL 23
-#define BNXT_ULP_CLASS_HID_MASK 2047
+#define BNXT_ULP_CLASS_HID_MASK 511
#define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 2048
#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 15
#define BNXT_ULP_ACT_HID_LOW_PRIME 7919
@@ -32,11 +32,11 @@
#define BNXT_ULP_HDR_SIG_ID_SHIFT 4
#define BNXT_ULP_GLB_FIELD_TBL_SIZE 3033
#define ULP_WH_PLUS_CLASS_TMPL_LIST_SIZE 7
-#define ULP_WH_PLUS_CLASS_TBL_LIST_SIZE 38
-#define ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE 192
-#define ULP_WH_PLUS_CLASS_IDENT_LIST_SIZE 10
-#define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 341
-#define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 10
+#define ULP_WH_PLUS_CLASS_TBL_LIST_SIZE 41
+#define ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE 257
+#define ULP_WH_PLUS_CLASS_IDENT_LIST_SIZE 11
+#define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 367
+#define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 14
#define ULP_STINGRAY_CLASS_TMPL_LIST_SIZE 7
#define ULP_STINGRAY_CLASS_TBL_LIST_SIZE 38
#define ULP_STINGRAY_CLASS_KEY_INFO_LIST_SIZE 192
@@ -48,7 +48,7 @@
#define ULP_WH_PLUS_ACT_KEY_INFO_LIST_SIZE 0
#define ULP_WH_PLUS_ACT_IDENT_LIST_SIZE 0
#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 65
-#define ULP_WH_PLUS_ACT_COND_LIST_SIZE 2
+#define ULP_WH_PLUS_ACT_COND_LIST_SIZE 11
#define ULP_STINGRAY_ACT_TMPL_LIST_SIZE 2
#define ULP_STINGRAY_ACT_TBL_LIST_SIZE 4
#define ULP_STINGRAY_ACT_KEY_INFO_LIST_SIZE 0
@@ -248,7 +248,8 @@ enum bnxt_ulp_field_cond_src {
BNXT_ULP_FIELD_COND_SRC_ACT_BIT = 3,
BNXT_ULP_FIELD_COND_SRC_HDR_BIT = 4,
BNXT_ULP_FIELD_COND_SRC_FIELD_BIT = 5,
- BNXT_ULP_FIELD_COND_SRC_LAST = 6
+ BNXT_ULP_FIELD_COND_SRC_SRC1_PLUS_SRC2 = 6,
+ BNXT_ULP_FIELD_COND_SRC_LAST = 7
};
enum bnxt_ulp_field_src {
@@ -368,10 +369,11 @@ enum bnxt_ulp_rf_idx {
BNXT_ULP_RF_IDX_SRC_PROPERTY_PTR = 25,
BNXT_ULP_RF_IDX_GENERIC_TBL_HIT = 26,
BNXT_ULP_RF_IDX_MIRROR_PTR_0 = 27,
- BNXT_ULP_RF_IDX_HDR_SIG_ID = 28,
- BNXT_ULP_RF_IDX_FLOW_SIG_ID = 29,
- BNXT_ULP_RF_IDX_RID = 30,
- BNXT_ULP_RF_IDX_LAST = 31
+ BNXT_ULP_RF_IDX_MIRROR_ID_0 = 28,
+ BNXT_ULP_RF_IDX_HDR_SIG_ID = 29,
+ BNXT_ULP_RF_IDX_FLOW_SIG_ID = 30,
+ BNXT_ULP_RF_IDX_RID = 31,
+ BNXT_ULP_RF_IDX_LAST = 32
};
enum bnxt_ulp_tcam_tbl_opc {
@@ -427,7 +429,7 @@ enum bnxt_ulp_resource_sub_type {
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_EXT_COUNT = 4,
BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM = 0,
BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM = 1,
- BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL = 2
+ BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR = 2
};
enum bnxt_ulp_act_prop_sz {
@@ -959,166 +961,86 @@ enum ulp_sr_sym {
};
enum bnxt_ulp_class_hid {
- BNXT_ULP_CLASS_HID_07e0 = 0x07e0,
- BNXT_ULP_CLASS_HID_01dc = 0x01dc,
- BNXT_ULP_CLASS_HID_006e = 0x006e,
- BNXT_ULP_CLASS_HID_025a = 0x025a,
- BNXT_ULP_CLASS_HID_0146 = 0x0146,
- BNXT_ULP_CLASS_HID_0332 = 0x0332,
- BNXT_ULP_CLASS_HID_01c4 = 0x01c4,
- BNXT_ULP_CLASS_HID_078a = 0x078a,
- BNXT_ULP_CLASS_HID_02ed = 0x02ed,
- BNXT_ULP_CLASS_HID_04d9 = 0x04d9,
- BNXT_ULP_CLASS_HID_036b = 0x036b,
- BNXT_ULP_CLASS_HID_0131 = 0x0131,
- BNXT_ULP_CLASS_HID_0217 = 0x0217,
- BNXT_ULP_CLASS_HID_03c3 = 0x03c3,
- BNXT_ULP_CLASS_HID_0295 = 0x0295,
- BNXT_ULP_CLASS_HID_0441 = 0x0441,
- BNXT_ULP_CLASS_HID_0095 = 0x0095,
- BNXT_ULP_CLASS_HID_0241 = 0x0241,
- BNXT_ULP_CLASS_HID_04ed = 0x04ed,
- BNXT_ULP_CLASS_HID_06d9 = 0x06d9,
- BNXT_ULP_CLASS_HID_07bf = 0x07bf,
- BNXT_ULP_CLASS_HID_016b = 0x016b,
- BNXT_ULP_CLASS_HID_0417 = 0x0417,
- BNXT_ULP_CLASS_HID_05c3 = 0x05c3,
- BNXT_ULP_CLASS_HID_0187 = 0x0187,
- BNXT_ULP_CLASS_HID_0373 = 0x0373,
- BNXT_ULP_CLASS_HID_0205 = 0x0205,
- BNXT_ULP_CLASS_HID_03f1 = 0x03f1,
- BNXT_ULP_CLASS_HID_00a1 = 0x00a1,
- BNXT_ULP_CLASS_HID_029d = 0x029d,
- BNXT_ULP_CLASS_HID_012f = 0x012f,
- BNXT_ULP_CLASS_HID_031b = 0x031b,
- BNXT_ULP_CLASS_HID_072f = 0x072f,
- BNXT_ULP_CLASS_HID_011b = 0x011b,
- BNXT_ULP_CLASS_HID_0387 = 0x0387,
- BNXT_ULP_CLASS_HID_0573 = 0x0573,
- BNXT_ULP_CLASS_HID_0649 = 0x0649,
- BNXT_ULP_CLASS_HID_0005 = 0x0005,
- BNXT_ULP_CLASS_HID_02a1 = 0x02a1,
- BNXT_ULP_CLASS_HID_049d = 0x049d,
- BNXT_ULP_CLASS_HID_01ea = 0x01ea,
- BNXT_ULP_CLASS_HID_03de = 0x03de,
- BNXT_ULP_CLASS_HID_0672 = 0x0672,
- BNXT_ULP_CLASS_HID_0026 = 0x0026,
- BNXT_ULP_CLASS_HID_0746 = 0x0746,
- BNXT_ULP_CLASS_HID_010a = 0x010a,
- BNXT_ULP_CLASS_HID_03ae = 0x03ae,
- BNXT_ULP_CLASS_HID_0592 = 0x0592,
- BNXT_ULP_CLASS_HID_07d0 = 0x07d0,
- BNXT_ULP_CLASS_HID_01ec = 0x01ec,
- BNXT_ULP_CLASS_HID_005e = 0x005e,
- BNXT_ULP_CLASS_HID_026a = 0x026a,
- BNXT_ULP_CLASS_HID_0176 = 0x0176,
- BNXT_ULP_CLASS_HID_0302 = 0x0302,
- BNXT_ULP_CLASS_HID_01f4 = 0x01f4,
- BNXT_ULP_CLASS_HID_07ba = 0x07ba,
- BNXT_ULP_CLASS_HID_06a7 = 0x06a7,
- BNXT_ULP_CLASS_HID_006b = 0x006b,
- BNXT_ULP_CLASS_HID_0725 = 0x0725,
- BNXT_ULP_CLASS_HID_00e9 = 0x00e9,
- BNXT_ULP_CLASS_HID_05d9 = 0x05d9,
- BNXT_ULP_CLASS_HID_078d = 0x078d,
- BNXT_ULP_CLASS_HID_065f = 0x065f,
+ BNXT_ULP_CLASS_HID_005c = 0x005c,
BNXT_ULP_CLASS_HID_0003 = 0x0003,
- BNXT_ULP_CLASS_HID_045f = 0x045f,
- BNXT_ULP_CLASS_HID_0603 = 0x0603,
- BNXT_ULP_CLASS_HID_00a7 = 0x00a7,
- BNXT_ULP_CLASS_HID_026b = 0x026b,
- BNXT_ULP_CLASS_HID_0371 = 0x0371,
- BNXT_ULP_CLASS_HID_0525 = 0x0525,
- BNXT_ULP_CLASS_HID_07d9 = 0x07d9,
+ BNXT_ULP_CLASS_HID_0132 = 0x0132,
+ BNXT_ULP_CLASS_HID_00e1 = 0x00e1,
+ BNXT_ULP_CLASS_HID_0044 = 0x0044,
+ BNXT_ULP_CLASS_HID_001b = 0x001b,
+ BNXT_ULP_CLASS_HID_012a = 0x012a,
+ BNXT_ULP_CLASS_HID_00f9 = 0x00f9,
BNXT_ULP_CLASS_HID_018d = 0x018d,
- BNXT_ULP_CLASS_HID_0177 = 0x0177,
- BNXT_ULP_CLASS_HID_033b = 0x033b,
- BNXT_ULP_CLASS_HID_05df = 0x05df,
- BNXT_ULP_CLASS_HID_0783 = 0x0783,
- BNXT_ULP_CLASS_HID_0069 = 0x0069,
- BNXT_ULP_CLASS_HID_025d = 0x025d,
- BNXT_ULP_CLASS_HID_00ef = 0x00ef,
- BNXT_ULP_CLASS_HID_06a5 = 0x06a5,
- BNXT_ULP_CLASS_HID_02f1 = 0x02f1,
- BNXT_ULP_CLASS_HID_04a5 = 0x04a5,
- BNXT_ULP_CLASS_HID_0377 = 0x0377,
- BNXT_ULP_CLASS_HID_053b = 0x053b,
- BNXT_ULP_CLASS_HID_0601 = 0x0601,
- BNXT_ULP_CLASS_HID_03df = 0x03df,
- BNXT_ULP_CLASS_HID_0269 = 0x0269,
- BNXT_ULP_CLASS_HID_045d = 0x045d,
- BNXT_ULP_CLASS_HID_02dd = 0x02dd,
- BNXT_ULP_CLASS_HID_04e9 = 0x04e9,
- BNXT_ULP_CLASS_HID_035b = 0x035b,
- BNXT_ULP_CLASS_HID_0101 = 0x0101,
- BNXT_ULP_CLASS_HID_0227 = 0x0227,
- BNXT_ULP_CLASS_HID_03f3 = 0x03f3,
- BNXT_ULP_CLASS_HID_02a5 = 0x02a5,
- BNXT_ULP_CLASS_HID_0471 = 0x0471,
- BNXT_ULP_CLASS_HID_00a5 = 0x00a5,
- BNXT_ULP_CLASS_HID_0271 = 0x0271,
- BNXT_ULP_CLASS_HID_04dd = 0x04dd,
- BNXT_ULP_CLASS_HID_06e9 = 0x06e9,
- BNXT_ULP_CLASS_HID_078f = 0x078f,
- BNXT_ULP_CLASS_HID_015b = 0x015b,
- BNXT_ULP_CLASS_HID_0427 = 0x0427,
- BNXT_ULP_CLASS_HID_05f3 = 0x05f3,
- BNXT_ULP_CLASS_HID_01b7 = 0x01b7,
- BNXT_ULP_CLASS_HID_0343 = 0x0343,
- BNXT_ULP_CLASS_HID_0235 = 0x0235,
- BNXT_ULP_CLASS_HID_03c1 = 0x03c1,
- BNXT_ULP_CLASS_HID_0091 = 0x0091,
- BNXT_ULP_CLASS_HID_02ad = 0x02ad,
- BNXT_ULP_CLASS_HID_011f = 0x011f,
- BNXT_ULP_CLASS_HID_032b = 0x032b,
- BNXT_ULP_CLASS_HID_071f = 0x071f,
- BNXT_ULP_CLASS_HID_012b = 0x012b,
- BNXT_ULP_CLASS_HID_03b7 = 0x03b7,
- BNXT_ULP_CLASS_HID_0543 = 0x0543,
- BNXT_ULP_CLASS_HID_0679 = 0x0679,
- BNXT_ULP_CLASS_HID_0035 = 0x0035,
- BNXT_ULP_CLASS_HID_0291 = 0x0291,
- BNXT_ULP_CLASS_HID_04ad = 0x04ad,
- BNXT_ULP_CLASS_HID_01da = 0x01da,
- BNXT_ULP_CLASS_HID_03ee = 0x03ee,
- BNXT_ULP_CLASS_HID_0642 = 0x0642,
- BNXT_ULP_CLASS_HID_0016 = 0x0016,
- BNXT_ULP_CLASS_HID_0776 = 0x0776,
- BNXT_ULP_CLASS_HID_013a = 0x013a,
- BNXT_ULP_CLASS_HID_039e = 0x039e,
- BNXT_ULP_CLASS_HID_05a2 = 0x05a2,
- BNXT_ULP_CLASS_HID_0697 = 0x0697,
+ BNXT_ULP_CLASS_HID_00a7 = 0x00a7,
+ BNXT_ULP_CLASS_HID_006f = 0x006f,
+ BNXT_ULP_CLASS_HID_0181 = 0x0181,
+ BNXT_ULP_CLASS_HID_0195 = 0x0195,
+ BNXT_ULP_CLASS_HID_00bf = 0x00bf,
+ BNXT_ULP_CLASS_HID_0077 = 0x0077,
+ BNXT_ULP_CLASS_HID_0199 = 0x0199,
+ BNXT_ULP_CLASS_HID_009a = 0x009a,
+ BNXT_ULP_CLASS_HID_0192 = 0x0192,
+ BNXT_ULP_CLASS_HID_01e2 = 0x01e2,
+ BNXT_ULP_CLASS_HID_00fa = 0x00fa,
+ BNXT_ULP_CLASS_HID_0165 = 0x0165,
+ BNXT_ULP_CLASS_HID_0042 = 0x0042,
+ BNXT_ULP_CLASS_HID_00cd = 0x00cd,
+ BNXT_ULP_CLASS_HID_01aa = 0x01aa,
+ BNXT_ULP_CLASS_HID_0178 = 0x0178,
+ BNXT_ULP_CLASS_HID_0070 = 0x0070,
+ BNXT_ULP_CLASS_HID_00f3 = 0x00f3,
+ BNXT_ULP_CLASS_HID_01d8 = 0x01d8,
BNXT_ULP_CLASS_HID_005b = 0x005b,
- BNXT_ULP_CLASS_HID_0715 = 0x0715,
- BNXT_ULP_CLASS_HID_00d9 = 0x00d9,
- BNXT_ULP_CLASS_HID_05e9 = 0x05e9,
- BNXT_ULP_CLASS_HID_07bd = 0x07bd,
- BNXT_ULP_CLASS_HID_066f = 0x066f,
- BNXT_ULP_CLASS_HID_0033 = 0x0033,
- BNXT_ULP_CLASS_HID_046f = 0x046f,
- BNXT_ULP_CLASS_HID_0633 = 0x0633,
- BNXT_ULP_CLASS_HID_0097 = 0x0097,
- BNXT_ULP_CLASS_HID_025b = 0x025b,
- BNXT_ULP_CLASS_HID_0341 = 0x0341,
- BNXT_ULP_CLASS_HID_0515 = 0x0515,
- BNXT_ULP_CLASS_HID_07e9 = 0x07e9,
+ BNXT_ULP_CLASS_HID_0153 = 0x0153,
+ BNXT_ULP_CLASS_HID_01a3 = 0x01a3,
+ BNXT_ULP_CLASS_HID_00bb = 0x00bb,
+ BNXT_ULP_CLASS_HID_0082 = 0x0082,
+ BNXT_ULP_CLASS_HID_018a = 0x018a,
+ BNXT_ULP_CLASS_HID_01fa = 0x01fa,
+ BNXT_ULP_CLASS_HID_00e2 = 0x00e2,
+ BNXT_ULP_CLASS_HID_017d = 0x017d,
+ BNXT_ULP_CLASS_HID_005a = 0x005a,
+ BNXT_ULP_CLASS_HID_00d5 = 0x00d5,
+ BNXT_ULP_CLASS_HID_01b2 = 0x01b2,
+ BNXT_ULP_CLASS_HID_0160 = 0x0160,
+ BNXT_ULP_CLASS_HID_0068 = 0x0068,
+ BNXT_ULP_CLASS_HID_00eb = 0x00eb,
+ BNXT_ULP_CLASS_HID_01c0 = 0x01c0,
+ BNXT_ULP_CLASS_HID_0043 = 0x0043,
+ BNXT_ULP_CLASS_HID_014b = 0x014b,
+ BNXT_ULP_CLASS_HID_01bb = 0x01bb,
+ BNXT_ULP_CLASS_HID_00a3 = 0x00a3,
+ BNXT_ULP_CLASS_HID_00cb = 0x00cb,
+ BNXT_ULP_CLASS_HID_00b4 = 0x00b4,
+ BNXT_ULP_CLASS_HID_0013 = 0x0013,
+ BNXT_ULP_CLASS_HID_001c = 0x001c,
+ BNXT_ULP_CLASS_HID_017b = 0x017b,
+ BNXT_ULP_CLASS_HID_0164 = 0x0164,
+ BNXT_ULP_CLASS_HID_00c3 = 0x00c3,
+ BNXT_ULP_CLASS_HID_00cc = 0x00cc,
+ BNXT_ULP_CLASS_HID_01a5 = 0x01a5,
+ BNXT_ULP_CLASS_HID_0196 = 0x0196,
+ BNXT_ULP_CLASS_HID_010d = 0x010d,
+ BNXT_ULP_CLASS_HID_00fe = 0x00fe,
+ BNXT_ULP_CLASS_HID_0084 = 0x0084,
+ BNXT_ULP_CLASS_HID_0046 = 0x0046,
+ BNXT_ULP_CLASS_HID_01ec = 0x01ec,
+ BNXT_ULP_CLASS_HID_01ae = 0x01ae,
+ BNXT_ULP_CLASS_HID_00d3 = 0x00d3,
+ BNXT_ULP_CLASS_HID_00ac = 0x00ac,
+ BNXT_ULP_CLASS_HID_000b = 0x000b,
+ BNXT_ULP_CLASS_HID_0004 = 0x0004,
+ BNXT_ULP_CLASS_HID_0163 = 0x0163,
+ BNXT_ULP_CLASS_HID_017c = 0x017c,
+ BNXT_ULP_CLASS_HID_00db = 0x00db,
+ BNXT_ULP_CLASS_HID_00d4 = 0x00d4,
BNXT_ULP_CLASS_HID_01bd = 0x01bd,
- BNXT_ULP_CLASS_HID_0147 = 0x0147,
- BNXT_ULP_CLASS_HID_030b = 0x030b,
- BNXT_ULP_CLASS_HID_05ef = 0x05ef,
- BNXT_ULP_CLASS_HID_07b3 = 0x07b3,
- BNXT_ULP_CLASS_HID_0059 = 0x0059,
- BNXT_ULP_CLASS_HID_026d = 0x026d,
- BNXT_ULP_CLASS_HID_00df = 0x00df,
- BNXT_ULP_CLASS_HID_0695 = 0x0695,
- BNXT_ULP_CLASS_HID_02c1 = 0x02c1,
- BNXT_ULP_CLASS_HID_0495 = 0x0495,
- BNXT_ULP_CLASS_HID_0347 = 0x0347,
- BNXT_ULP_CLASS_HID_050b = 0x050b,
- BNXT_ULP_CLASS_HID_0631 = 0x0631,
- BNXT_ULP_CLASS_HID_03ef = 0x03ef,
- BNXT_ULP_CLASS_HID_0259 = 0x0259,
- BNXT_ULP_CLASS_HID_046d = 0x046d
+ BNXT_ULP_CLASS_HID_018e = 0x018e,
+ BNXT_ULP_CLASS_HID_0115 = 0x0115,
+ BNXT_ULP_CLASS_HID_00e6 = 0x00e6,
+ BNXT_ULP_CLASS_HID_009c = 0x009c,
+ BNXT_ULP_CLASS_HID_005e = 0x005e,
+ BNXT_ULP_CLASS_HID_01f4 = 0x01f4,
+ BNXT_ULP_CLASS_HID_01b6 = 0x01b6
};
enum bnxt_ulp_act_hid {
@@ -3,7 +3,7 @@
* All rights reserved.
*/
-/* date: Tue Dec 1 10:17:11 2020 */
+/* date: Mon Dec 7 09:51:03 2020 */
#ifndef ULP_HDR_FIELD_ENUMS_H_
#define ULP_HDR_FIELD_ENUMS_H_
@@ -113,23 +113,25 @@ enum bnxt_ulp_hf1_0_bitmask {
BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC = 0x2000000000000000,
BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC = 0x1000000000000000,
BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE = 0x0800000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_VER = 0x0400000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_TC = 0x0200000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_FLOW_LABEL = 0x0100000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0080000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_PROTO_ID = 0x0040000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_TTL = 0x0020000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_SRC_ADDR = 0x0010000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_IPV6_DST_ADDR = 0x0008000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT = 0x0004000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT = 0x0002000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_TCP_SENT_SEQ = 0x0001000000000000,
- BNXT_ULP_HF1_0_BITMASK_O_TCP_RECV_ACK = 0x0000800000000000,
- BNXT_ULP_HF1_0_BITMASK_O_TCP_DATA_OFF = 0x0000400000000000,
- BNXT_ULP_HF1_0_BITMASK_O_TCP_TCP_FLAGS = 0x0000200000000000,
- BNXT_ULP_HF1_0_BITMASK_O_TCP_RX_WIN = 0x0000100000000000,
- BNXT_ULP_HF1_0_BITMASK_O_TCP_CSUM = 0x0000080000000000,
- BNXT_ULP_HF1_0_BITMASK_O_TCP_URP = 0x0000040000000000
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_VER = 0x0400000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_TOS = 0x0200000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_LEN = 0x0100000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_FRAG_ID = 0x0080000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_FRAG_OFF = 0x0040000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_TTL = 0x0020000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID = 0x0010000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_CSUM = 0x0008000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR = 0x0004000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR = 0x0002000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT = 0x0001000000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT = 0x0000800000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_TCP_SENT_SEQ = 0x0000400000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_TCP_RECV_ACK = 0x0000200000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_TCP_DATA_OFF = 0x0000100000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_TCP_TCP_FLAGS = 0x0000080000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_TCP_RX_WIN = 0x0000040000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_TCP_CSUM = 0x0000020000000000,
+ BNXT_ULP_HF1_0_BITMASK_O_TCP_URP = 0x0000010000000000
};
enum bnxt_ulp_hf1_1_bitmask {
@@ -138,26 +140,20 @@ enum bnxt_ulp_hf1_1_bitmask {
BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC = 0x2000000000000000,
BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC = 0x1000000000000000,
BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE = 0x0800000000000000,
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_CFI_PRI = 0x0400000000000000,
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID = 0x0200000000000000,
- BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE = 0x0100000000000000,
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_VER = 0x0080000000000000,
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_TC = 0x0040000000000000,
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_FLOW_LABEL = 0x0020000000000000,
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0010000000000000,
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_PROTO_ID = 0x0008000000000000,
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_TTL = 0x0004000000000000,
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_SRC_ADDR = 0x0002000000000000,
- BNXT_ULP_HF1_1_BITMASK_O_IPV6_DST_ADDR = 0x0001000000000000,
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT = 0x0000800000000000,
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT = 0x0000400000000000,
- BNXT_ULP_HF1_1_BITMASK_O_TCP_SENT_SEQ = 0x0000200000000000,
- BNXT_ULP_HF1_1_BITMASK_O_TCP_RECV_ACK = 0x0000100000000000,
- BNXT_ULP_HF1_1_BITMASK_O_TCP_DATA_OFF = 0x0000080000000000,
- BNXT_ULP_HF1_1_BITMASK_O_TCP_TCP_FLAGS = 0x0000040000000000,
- BNXT_ULP_HF1_1_BITMASK_O_TCP_RX_WIN = 0x0000020000000000,
- BNXT_ULP_HF1_1_BITMASK_O_TCP_CSUM = 0x0000010000000000,
- BNXT_ULP_HF1_1_BITMASK_O_TCP_URP = 0x0000008000000000
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_VER = 0x0400000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_TOS = 0x0200000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_LEN = 0x0100000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_FRAG_ID = 0x0080000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_FRAG_OFF = 0x0040000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_TTL = 0x0020000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID = 0x0010000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_CSUM = 0x0008000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR = 0x0004000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR = 0x0002000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_SRC_PORT = 0x0001000000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_DST_PORT = 0x0000800000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_LENGTH = 0x0000400000000000,
+ BNXT_ULP_HF1_1_BITMASK_O_UDP_CSUM = 0x0000200000000000
};
enum bnxt_ulp_hf1_2_bitmask {
@@ -166,25 +162,23 @@ enum bnxt_ulp_hf1_2_bitmask {
BNXT_ULP_HF1_2_BITMASK_O_ETH_DMAC = 0x2000000000000000,
BNXT_ULP_HF1_2_BITMASK_O_ETH_SMAC = 0x1000000000000000,
BNXT_ULP_HF1_2_BITMASK_O_ETH_TYPE = 0x0800000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_VER = 0x0400000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_TOS = 0x0200000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_LEN = 0x0100000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_FRAG_ID = 0x0080000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_FRAG_OFF = 0x0040000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_TTL = 0x0020000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_PROTO_ID = 0x0010000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_CSUM = 0x0008000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_SRC_ADDR = 0x0004000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_IPV4_DST_ADDR = 0x0002000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT = 0x0001000000000000,
- BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT = 0x0000800000000000,
- BNXT_ULP_HF1_2_BITMASK_O_TCP_SENT_SEQ = 0x0000400000000000,
- BNXT_ULP_HF1_2_BITMASK_O_TCP_RECV_ACK = 0x0000200000000000,
- BNXT_ULP_HF1_2_BITMASK_O_TCP_DATA_OFF = 0x0000100000000000,
- BNXT_ULP_HF1_2_BITMASK_O_TCP_TCP_FLAGS = 0x0000080000000000,
- BNXT_ULP_HF1_2_BITMASK_O_TCP_RX_WIN = 0x0000040000000000,
- BNXT_ULP_HF1_2_BITMASK_O_TCP_CSUM = 0x0000020000000000,
- BNXT_ULP_HF1_2_BITMASK_O_TCP_URP = 0x0000010000000000
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_VER = 0x0400000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_TC = 0x0200000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_FLOW_LABEL = 0x0100000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0080000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_PROTO_ID = 0x0040000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_TTL = 0x0020000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_SRC_ADDR = 0x0010000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_IPV6_DST_ADDR = 0x0008000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_SRC_PORT = 0x0004000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_DST_PORT = 0x0002000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_SENT_SEQ = 0x0001000000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_RECV_ACK = 0x0000800000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_DATA_OFF = 0x0000400000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_TCP_FLAGS = 0x0000200000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_RX_WIN = 0x0000100000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_CSUM = 0x0000080000000000,
+ BNXT_ULP_HF1_2_BITMASK_O_TCP_URP = 0x0000040000000000
};
enum bnxt_ulp_hf1_3_bitmask {
@@ -246,18 +240,20 @@ enum bnxt_ulp_hf1_5_bitmask {
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_CFI_PRI = 0x0400000000000000,
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_VID = 0x0200000000000000,
BNXT_ULP_HF1_5_BITMASK_OO_VLAN_TYPE = 0x0100000000000000,
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_VER = 0x0080000000000000,
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_TC = 0x0040000000000000,
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_FLOW_LABEL = 0x0020000000000000,
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0010000000000000,
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_PROTO_ID = 0x0008000000000000,
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_TTL = 0x0004000000000000,
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_SRC_ADDR = 0x0002000000000000,
- BNXT_ULP_HF1_5_BITMASK_O_IPV6_DST_ADDR = 0x0001000000000000,
- BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT = 0x0000800000000000,
- BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT = 0x0000400000000000,
- BNXT_ULP_HF1_5_BITMASK_O_UDP_LENGTH = 0x0000200000000000,
- BNXT_ULP_HF1_5_BITMASK_O_UDP_CSUM = 0x0000100000000000
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_VER = 0x0080000000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_TOS = 0x0040000000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_LEN = 0x0020000000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_FRAG_ID = 0x0010000000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_FRAG_OFF = 0x0008000000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_TTL = 0x0004000000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_PROTO_ID = 0x0002000000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_CSUM = 0x0001000000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_SRC_ADDR = 0x0000800000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_IPV4_DST_ADDR = 0x0000400000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_UDP_DST_PORT = 0x0000100000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_UDP_LENGTH = 0x0000080000000000,
+ BNXT_ULP_HF1_5_BITMASK_O_UDP_CSUM = 0x0000040000000000
};
enum bnxt_ulp_hf1_6_bitmask {
@@ -266,20 +262,26 @@ enum bnxt_ulp_hf1_6_bitmask {
BNXT_ULP_HF1_6_BITMASK_O_ETH_DMAC = 0x2000000000000000,
BNXT_ULP_HF1_6_BITMASK_O_ETH_SMAC = 0x1000000000000000,
BNXT_ULP_HF1_6_BITMASK_O_ETH_TYPE = 0x0800000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_VER = 0x0400000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_TOS = 0x0200000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_LEN = 0x0100000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_FRAG_ID = 0x0080000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_FRAG_OFF = 0x0040000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_TTL = 0x0020000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_PROTO_ID = 0x0010000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_CSUM = 0x0008000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_SRC_ADDR = 0x0004000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_IPV4_DST_ADDR = 0x0002000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_UDP_SRC_PORT = 0x0001000000000000,
- BNXT_ULP_HF1_6_BITMASK_O_UDP_DST_PORT = 0x0000800000000000,
- BNXT_ULP_HF1_6_BITMASK_O_UDP_LENGTH = 0x0000400000000000,
- BNXT_ULP_HF1_6_BITMASK_O_UDP_CSUM = 0x0000200000000000
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_CFI_PRI = 0x0400000000000000,
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_VID = 0x0200000000000000,
+ BNXT_ULP_HF1_6_BITMASK_OO_VLAN_TYPE = 0x0100000000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_VER = 0x0080000000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_TC = 0x0040000000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_FLOW_LABEL = 0x0020000000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0010000000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_PROTO_ID = 0x0008000000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_TTL = 0x0004000000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_SRC_ADDR = 0x0002000000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_IPV6_DST_ADDR = 0x0001000000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SRC_PORT = 0x0000800000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DST_PORT = 0x0000400000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_SENT_SEQ = 0x0000200000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_RECV_ACK = 0x0000100000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_DATA_OFF = 0x0000080000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_TCP_FLAGS = 0x0000040000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_RX_WIN = 0x0000020000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_CSUM = 0x0000010000000000,
+ BNXT_ULP_HF1_6_BITMASK_O_TCP_URP = 0x0000008000000000
};
enum bnxt_ulp_hf1_7_bitmask {
@@ -291,19 +293,17 @@ enum bnxt_ulp_hf1_7_bitmask {
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_CFI_PRI = 0x0400000000000000,
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_VID = 0x0200000000000000,
BNXT_ULP_HF1_7_BITMASK_OO_VLAN_TYPE = 0x0100000000000000,
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_VER = 0x0080000000000000,
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_TOS = 0x0040000000000000,
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_LEN = 0x0020000000000000,
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_FRAG_ID = 0x0010000000000000,
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_FRAG_OFF = 0x0008000000000000,
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_TTL = 0x0004000000000000,
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_PROTO_ID = 0x0002000000000000,
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_CSUM = 0x0001000000000000,
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_SRC_ADDR = 0x0000800000000000,
- BNXT_ULP_HF1_7_BITMASK_O_IPV4_DST_ADDR = 0x0000400000000000,
- BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000,
- BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT = 0x0000100000000000,
- BNXT_ULP_HF1_7_BITMASK_O_UDP_LENGTH = 0x0000080000000000,
- BNXT_ULP_HF1_7_BITMASK_O_UDP_CSUM = 0x0000040000000000
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_VER = 0x0080000000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_TC = 0x0040000000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_FLOW_LABEL = 0x0020000000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0010000000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_PROTO_ID = 0x0008000000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_TTL = 0x0004000000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_SRC_ADDR = 0x0002000000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_IPV6_DST_ADDR = 0x0001000000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_UDP_SRC_PORT = 0x0000800000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_UDP_DST_PORT = 0x0000400000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_UDP_LENGTH = 0x0000200000000000,
+ BNXT_ULP_HF1_7_BITMASK_O_UDP_CSUM = 0x0000100000000000
};
#endif
@@ -3,7 +3,7 @@
* All rights reserved.
*/
-/* date: Tue Dec 1 10:17:11 2020 */
+/* date: Fri Dec 4 19:01:47 2020 */
#include "ulp_template_db_enum.h"
#include "ulp_template_db_field.h"
@@ -36,13 +36,13 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = {
.result_num_bytes = 16,
.result_byte_order = BNXT_ULP_BYTE_ORDER_LE
},
- [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL << 1 |
+ [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR << 1 |
BNXT_ULP_DIRECTION_INGRESS] = {
.result_num_entries = 16,
.result_num_bytes = 16,
.result_byte_order = BNXT_ULP_BYTE_ORDER_LE
},
- [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL << 1 |
+ [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR << 1 |
BNXT_ULP_DIRECTION_EGRESS] = {
.result_num_entries = 16,
.result_num_bytes = 16,
@@ -207,11 +207,11 @@ uint32_t ulp_glb_template_tbl[] = {
/* Provides act_bitmask */
struct bnxt_ulp_shared_act_info ulp_shared_act_info[] = {
- [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL << 1 |
+ [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR << 1 |
BNXT_ULP_DIRECTION_INGRESS] = {
.act_bitmask = BNXT_ULP_ACT_BIT_SHARED_SAMPLE
},
- [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL << 1 |
+ [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR << 1 |
BNXT_ULP_DIRECTION_EGRESS] = {
.act_bitmask = BNXT_ULP_ACT_BIT_SHARED_SAMPLE
}
@@ -312,72 +312,66 @@ uint8_t ulp_glb_field_tbl[] = {
[2050] = 2,
[2052] = 3,
[2054] = 4,
- [2076] = 5,
- [2078] = 6,
- [2080] = 7,
- [2082] = 8,
- [2084] = 9,
- [2086] = 10,
- [2088] = 11,
- [2090] = 12,
- [2102] = 13,
- [2104] = 14,
- [2106] = 15,
- [2108] = 16,
- [2110] = 17,
- [2112] = 18,
- [2114] = 19,
- [2116] = 20,
- [2118] = 21,
+ [2056] = 5,
+ [2058] = 6,
+ [2060] = 7,
+ [2062] = 8,
+ [2064] = 9,
+ [2066] = 10,
+ [2068] = 11,
+ [2070] = 12,
+ [2072] = 13,
+ [2074] = 14,
+ [2102] = 15,
+ [2104] = 16,
+ [2106] = 17,
+ [2108] = 18,
+ [2110] = 19,
+ [2112] = 20,
+ [2114] = 21,
+ [2116] = 22,
+ [2118] = 23,
[2176] = 0,
[2177] = 1,
[2178] = 2,
[2180] = 3,
[2182] = 4,
- [2204] = 8,
- [2206] = 9,
- [2208] = 10,
- [2210] = 11,
- [2212] = 12,
- [2214] = 13,
- [2216] = 14,
- [2218] = 15,
- [2230] = 16,
- [2232] = 17,
- [2234] = 18,
- [2236] = 19,
- [2238] = 20,
- [2240] = 21,
- [2242] = 22,
- [2244] = 23,
- [2246] = 24,
- [2256] = 5,
- [2260] = 6,
- [2264] = 7,
+ [2184] = 5,
+ [2186] = 6,
+ [2188] = 7,
+ [2190] = 8,
+ [2192] = 9,
+ [2194] = 10,
+ [2196] = 11,
+ [2198] = 12,
+ [2200] = 13,
+ [2202] = 14,
+ [2248] = 15,
+ [2250] = 16,
+ [2252] = 17,
+ [2254] = 18,
[2304] = 0,
[2305] = 1,
[2306] = 2,
[2308] = 3,
[2310] = 4,
- [2312] = 5,
- [2314] = 6,
- [2316] = 7,
- [2318] = 8,
- [2320] = 9,
- [2322] = 10,
- [2324] = 11,
- [2326] = 12,
- [2328] = 13,
- [2330] = 14,
- [2358] = 15,
- [2360] = 16,
- [2362] = 17,
- [2364] = 18,
- [2366] = 19,
- [2368] = 20,
- [2370] = 21,
- [2372] = 22,
- [2374] = 23,
+ [2332] = 5,
+ [2334] = 6,
+ [2336] = 7,
+ [2338] = 8,
+ [2340] = 9,
+ [2342] = 10,
+ [2344] = 11,
+ [2346] = 12,
+ [2358] = 13,
+ [2360] = 14,
+ [2362] = 15,
+ [2364] = 16,
+ [2366] = 17,
+ [2368] = 18,
+ [2370] = 19,
+ [2372] = 20,
+ [2374] = 21,
[2432] = 0,
[2433] = 1,
[2434] = 2,
@@ -427,18 +421,20 @@ uint8_t ulp_glb_field_tbl[] = {
[2690] = 2,
[2692] = 3,
[2694] = 4,
- [2716] = 8,
- [2718] = 9,
- [2720] = 10,
- [2722] = 11,
- [2724] = 12,
- [2726] = 13,
- [2728] = 14,
- [2730] = 15,
- [2760] = 16,
- [2762] = 17,
- [2764] = 18,
- [2766] = 19,
+ [2696] = 8,
+ [2698] = 9,
+ [2700] = 10,
+ [2702] = 11,
+ [2704] = 12,
+ [2706] = 13,
+ [2708] = 14,
+ [2710] = 15,
+ [2712] = 16,
+ [2714] = 17,
+ [2760] = 18,
+ [2762] = 19,
+ [2764] = 20,
+ [2766] = 21,
[2768] = 5,
[2772] = 6,
[2776] = 7,
@@ -447,39 +443,43 @@ uint8_t ulp_glb_field_tbl[] = {
[2818] = 2,
[2820] = 3,
[2822] = 4,
- [2824] = 5,
- [2826] = 6,
- [2828] = 7,
- [2830] = 8,
- [2832] = 9,
- [2834] = 10,
- [2836] = 11,
- [2838] = 12,
- [2840] = 13,
- [2842] = 14,
- [2888] = 15,
- [2890] = 16,
- [2892] = 17,
- [2894] = 18,
+ [2844] = 8,
+ [2846] = 9,
+ [2848] = 10,
+ [2850] = 11,
+ [2852] = 12,
+ [2854] = 13,
+ [2856] = 14,
+ [2858] = 15,
+ [2870] = 16,
+ [2872] = 17,
+ [2874] = 18,
+ [2876] = 19,
+ [2878] = 20,
+ [2880] = 21,
+ [2882] = 22,
+ [2884] = 23,
+ [2886] = 24,
+ [2896] = 5,
+ [2900] = 6,
+ [2904] = 7,
[2944] = 0,
[2945] = 1,
[2946] = 2,
[2948] = 3,
[2950] = 4,
- [2952] = 8,
- [2954] = 9,
- [2956] = 10,
- [2958] = 11,
- [2960] = 12,
- [2962] = 13,
- [2964] = 14,
- [2966] = 15,
- [2968] = 16,
- [2970] = 17,
- [3016] = 18,
- [3018] = 19,
- [3020] = 20,
- [3022] = 21,
+ [2972] = 8,
+ [2974] = 9,
+ [2976] = 10,
+ [2978] = 11,
+ [2980] = 12,
+ [2982] = 13,
+ [2984] = 14,
+ [2986] = 15,
+ [3016] = 16,
+ [3018] = 17,
+ [3020] = 18,
+ [3022] = 19,
[3024] = 5,
[3028] = 6,
[3032] = 7
@@ -3,7 +3,7 @@
* All rights reserved.
*/
-/* date: Tue Dec 1 17:07:12 2020 */
+/* date: Mon Dec 7 09:51:03 2020 */
#include "ulp_template_db_enum.h"
#include "ulp_template_db_field.h"
@@ -18,9 +18,9 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[] = {
.num_tbls = 4,
.start_tbl_idx = 0,
.reject_info = {
- .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
+ .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
.cond_start_idx = 0,
- .cond_nums = 0 }
+ .cond_nums = 9 }
}
};
@@ -34,7 +34,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
- .cond_start_idx = 0,
+ .cond_start_idx = 9,
.cond_nums = 1 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
@@ -56,7 +56,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
- .cond_start_idx = 1,
+ .cond_start_idx = 10,
.cond_nums = 1 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
@@ -78,7 +78,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 2,
+ .cond_start_idx = 11,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
@@ -100,7 +100,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.execute_info = {
.cond_goto = 0,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 2,
+ .cond_start_idx = 11,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
@@ -115,6 +115,42 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
};
struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = {
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_SRC
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACT_BIT_SET_IPV6_SRC
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACT_BIT_SET_TP_SRC
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACT_BIT_SET_IPV4_DST
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACT_BIT_SET_IPV6_DST
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACT_BIT_SET_TP_DST
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACT_BIT_SET_VLAN_VID
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACT_BIT_SET_VLAN_PCP
+ },
{
.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
.cond_operand = BNXT_ULP_ACT_BIT_COUNT
@@ -432,8 +468,21 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
{
.description = "mirror",
.field_bit_size = 2,
- .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_CONST
},
{
.description = "drop",
@@ -687,7 +736,10 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.description = "mirror",
.field_bit_size = 2,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff}
},
{
.description = "drop",
@@ -3,7 +3,7 @@
* All rights reserved.
*/
-/* date: Wed Dec 2 12:05:11 2020 */
+/* date: Mon Dec 7 10:38:39 2020 */
#include "ulp_template_db_enum.h"
#include "ulp_template_db_field.h"
@@ -15,7 +15,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[] = {
/* class_tid: 1, wh_plus, ingress */
[1] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 9,
+ .num_tbls = 11,
.start_tbl_idx = 0,
.reject_info = {
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
@@ -26,76 +26,55 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[] = {
[2] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 6,
- .start_tbl_idx = 9,
+ .start_tbl_idx = 11,
.reject_info = {
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 0 }
},
/* class_tid: 3, wh_plus, egress */
[3] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 8,
- .start_tbl_idx = 15,
+ .start_tbl_idx = 17,
.reject_info = {
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 0 }
},
/* class_tid: 4, wh_plus, egress */
[4] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 7,
- .start_tbl_idx = 23,
+ .num_tbls = 8,
+ .start_tbl_idx = 25,
.reject_info = {
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
- .cond_start_idx = 10,
+ .cond_start_idx = 12,
.cond_nums = 0 }
},
/* class_tid: 5, wh_plus, egress */
[5] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 7,
- .start_tbl_idx = 30,
+ .start_tbl_idx = 33,
.reject_info = {
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 }
},
/* class_tid: 6, wh_plus, egress */
[6] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 1,
- .start_tbl_idx = 37,
+ .start_tbl_idx = 40,
.reject_info = {
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 }
}
};
struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
- { /* class_tid: 1, wh_plus, table: l2_cntxt_tcam_cache.rd */
- .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
- .resource_sub_type =
- BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
- .direction = TF_DIR_RX,
- .execute_info = {
- .cond_goto = 2,
- .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
- .cond_start_idx = 0,
- .cond_nums = 1 },
- .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
- .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
- .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .key_start_idx = 0,
- .blob_key_bit_size = 8,
- .key_bit_size = 8,
- .key_num_fields = 1,
- .ident_start_idx = 0,
- .ident_nums = 1
- },
{ /* class_tid: 1, wh_plus, table: l2_cntxt_tcam.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
@@ -103,7 +82,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 1,
+ .cond_start_idx = 0,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
@@ -111,7 +90,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .key_start_idx = 1,
+ .key_start_idx = 0,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
@@ -119,7 +98,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 1,
+ .ident_start_idx = 0,
.ident_nums = 1
},
{ /* class_tid: 1, wh_plus, table: profile_tcam_cache.rd */
@@ -131,30 +110,57 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 1,
+ .cond_start_idx = 0,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .key_start_idx = 14,
+ .key_start_idx = 13,
.blob_key_bit_size = 14,
.key_bit_size = 14,
.key_num_fields = 3,
- .ident_start_idx = 2,
+ .ident_start_idx = 1,
.ident_nums = 3
},
{ /* class_tid: 1, wh_plus, table: branch.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_BRANCH_TABLE,
.direction = TF_DIR_RX,
.execute_info = {
- .cond_goto = 3,
+ .cond_goto = 4,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
- .cond_start_idx = 1,
+ .cond_start_idx = 0,
.cond_nums = 1 },
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH
},
- { /* class_tid: 1, wh_plus, table: profile_tcam.0 */
+ { /* class_tid: 1, wh_plus, table: profile_tcam.ipv4_0 */
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .direction = TF_DIR_RX,
+ .execute_info = {
+ .cond_goto = 2,
+ .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+ .cond_start_idx = 1,
+ .cond_nums = 1 },
+ .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+ .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0,
+ .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+ .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE,
+ .fdb_operand = BNXT_ULP_RF_IDX_RID,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
+ .key_start_idx = 16,
+ .blob_key_bit_size = 81,
+ .key_bit_size = 81,
+ .key_num_fields = 43,
+ .result_start_idx = 13,
+ .result_bit_size = 38,
+ .result_num_fields = 8,
+ .encap_num_fields = 0,
+ .ident_start_idx = 4,
+ .ident_nums = 1
+ },
+ { /* class_tid: 1, wh_plus, table: profile_tcam.ipv6_0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
@@ -170,11 +176,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .key_start_idx = 17,
+ .key_start_idx = 59,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 13,
+ .result_start_idx = 21,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
@@ -195,16 +201,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .key_start_idx = 60,
+ .key_start_idx = 102,
.blob_key_bit_size = 14,
.key_bit_size = 14,
.key_num_fields = 3,
- .result_start_idx = 21,
+ .result_start_idx = 29,
.result_bit_size = 66,
.result_num_fields = 5,
.encap_num_fields = 0
},
- { /* class_tid: 1, wh_plus, table: em.int_0 */
+ { /* class_tid: 1, wh_plus, table: em.ipv4_0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.direction = TF_DIR_RX,
@@ -218,22 +224,22 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .key_start_idx = 63,
+ .key_start_idx = 105,
.blob_key_bit_size = 176,
.key_bit_size = 176,
.key_num_fields = 10,
- .result_start_idx = 26,
+ .result_start_idx = 34,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0
},
- { /* class_tid: 1, wh_plus, table: eem.ext_0 */
+ { /* class_tid: 1, wh_plus, table: eem.ipv4_0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
.resource_type = TF_MEM_EXTERNAL,
.direction = TF_DIR_RX,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
.execute_info = {
- .cond_goto = 1,
+ .cond_goto = 3,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
.cond_start_idx = 3,
.cond_nums = 1 },
@@ -241,22 +247,68 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .key_start_idx = 73,
+ .key_start_idx = 115,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 10,
- .result_start_idx = 35,
+ .result_start_idx = 43,
+ .result_bit_size = 64,
+ .result_num_fields = 9,
+ .encap_num_fields = 0
+ },
+ { /* class_tid: 1, wh_plus, table: em.ipv6_0 */
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
+ .resource_type = TF_MEM_INTERNAL,
+ .direction = TF_DIR_RX,
+ .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT,
+ .execute_info = {
+ .cond_goto = 1,
+ .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+ .cond_start_idx = 4,
+ .cond_nums = 1 },
+ .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+ .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
+ .key_start_idx = 125,
+ .blob_key_bit_size = 416,
+ .key_bit_size = 416,
+ .key_num_fields = 11,
+ .result_start_idx = 52,
+ .result_bit_size = 64,
+ .result_num_fields = 9,
+ .encap_num_fields = 0
+ },
+ { /* class_tid: 1, wh_plus, table: eem.ipv6_0 */
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
+ .resource_type = TF_MEM_EXTERNAL,
+ .direction = TF_DIR_RX,
+ .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT,
+ .execute_info = {
+ .cond_goto = 1,
+ .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+ .cond_start_idx = 5,
+ .cond_nums = 1 },
+ .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+ .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
+ .key_start_idx = 136,
+ .blob_key_bit_size = 448,
+ .key_bit_size = 448,
+ .key_num_fields = 11,
+ .result_start_idx = 61,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0
},
- { /* class_tid: 1, wh_plus, table: last */
+ { /* class_tid: 1, wh_plus, table: branch.last */
.resource_func = BNXT_ULP_RESOURCE_FUNC_BRANCH_TABLE,
.direction = TF_DIR_RX,
.execute_info = {
.cond_goto = 0,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 0 },
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH
@@ -270,14 +322,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .result_start_idx = 44,
+ .result_start_idx = 70,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0
@@ -289,7 +341,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
@@ -300,11 +352,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .key_start_idx = 83,
+ .key_start_idx = 147,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 70,
+ .result_start_idx = 96,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
@@ -320,16 +372,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .key_start_idx = 96,
+ .key_start_idx = 160,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 83,
+ .result_start_idx = 109,
.result_bit_size = 62,
.result_num_fields = 4,
.encap_num_fields = 0
@@ -341,13 +393,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .result_start_idx = 87,
+ .result_start_idx = 113,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0
@@ -359,13 +411,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .result_start_idx = 88,
+ .result_start_idx = 114,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0
@@ -377,13 +429,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 0,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .result_start_idx = 89,
+ .result_start_idx = 115,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0
@@ -397,14 +449,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .result_start_idx = 90,
+ .result_start_idx = 116,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0
@@ -416,7 +468,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
- .cond_start_idx = 4,
+ .cond_start_idx = 6,
.cond_nums = 1 },
.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
@@ -426,11 +478,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .key_start_idx = 97,
+ .key_start_idx = 161,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 116,
+ .result_start_idx = 142,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
@@ -446,12 +498,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
- .cond_start_idx = 5,
+ .cond_start_idx = 7,
.cond_nums = 1 },
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .key_start_idx = 110,
+ .key_start_idx = 174,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
@@ -465,7 +517,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
- .cond_start_idx = 6,
+ .cond_start_idx = 8,
.cond_nums = 2 },
.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
@@ -474,11 +526,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .key_start_idx = 111,
+ .key_start_idx = 175,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 129,
+ .result_start_idx = 155,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
@@ -494,16 +546,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
- .cond_start_idx = 8,
+ .cond_start_idx = 10,
.cond_nums = 2 },
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .key_start_idx = 124,
+ .key_start_idx = 188,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 142,
+ .result_start_idx = 168,
.result_bit_size = 62,
.result_num_fields = 4,
.encap_num_fields = 0
@@ -515,13 +567,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 12,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .result_start_idx = 146,
+ .result_start_idx = 172,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0
@@ -533,13 +585,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 12,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .result_start_idx = 147,
+ .result_start_idx = 173,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0
@@ -551,17 +603,38 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 0,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 12,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .result_start_idx = 148,
+ .result_start_idx = 174,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0
},
+ { /* class_tid: 4, wh_plus, table: l2_cntxt_tcam_cache.rd_egr0 */
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+ .resource_sub_type =
+ BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
+ .direction = TF_DIR_TX,
+ .execute_info = {
+ .cond_goto = 1,
+ .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+ .cond_start_idx = 12,
+ .cond_nums = 0 },
+ .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
+ .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
+ .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
+ .key_start_idx = 189,
+ .blob_key_bit_size = 8,
+ .key_bit_size = 8,
+ .key_num_fields = 1,
+ .ident_start_idx = 9,
+ .ident_nums = 1
+ },
{ /* class_tid: 4, wh_plus, table: int_vtag_encap_record.egr0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_ACT_ENCAP_8B,
@@ -571,14 +644,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 12,
.cond_nums = 0 },
- .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE,
+ .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .result_start_idx = 149,
+ .result_start_idx = 175,
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 12
@@ -592,14 +665,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 12,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .result_start_idx = 161,
+ .result_start_idx = 187,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0
@@ -610,9 +683,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.direction = TF_DIR_TX,
.execute_info = {
.cond_goto = 1,
- .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
- .cond_nums = 0 },
+ .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+ .cond_start_idx = 12,
+ .cond_nums = 1 },
.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
@@ -620,15 +693,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .key_start_idx = 125,
+ .key_start_idx = 190,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 187,
+ .result_start_idx = 213,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 9,
+ .ident_start_idx = 10,
.ident_nums = 0
},
{ /* class_tid: 4, wh_plus, table: l2_cntxt_tcam_cache.wr_egr0 */
@@ -639,22 +712,20 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.direction = TF_DIR_TX,
.execute_info = {
.cond_goto = 1,
- .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
- .cond_nums = 0 },
+ .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
+ .cond_start_idx = 13,
+ .cond_nums = 1 },
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .key_start_idx = 138,
+ .key_start_idx = 203,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 200,
+ .result_start_idx = 226,
.result_bit_size = 62,
.result_num_fields = 4,
- .encap_num_fields = 0,
- .ident_start_idx = 9,
- .ident_nums = 0
+ .encap_num_fields = 0
},
{ /* class_tid: 4, wh_plus, table: int_full_act_record.ing0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -665,14 +736,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .result_start_idx = 204,
+ .result_start_idx = 230,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0
@@ -684,7 +755,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
@@ -694,15 +765,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .key_start_idx = 139,
+ .key_start_idx = 204,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 230,
+ .result_start_idx = 256,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 9,
+ .ident_start_idx = 10,
.ident_nums = 0
},
{ /* class_tid: 4, wh_plus, table: l2_cntxt_tcam_bypass.stagged_ing0 */
@@ -712,7 +783,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 0,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
@@ -722,15 +793,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .key_start_idx = 152,
+ .key_start_idx = 217,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 243,
+ .result_start_idx = 269,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 9,
+ .ident_start_idx = 10,
.ident_nums = 0
},
{ /* class_tid: 5, wh_plus, table: l2_cntxt_tcam.egr */
@@ -740,24 +811,23 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
- .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
+ .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .key_start_idx = 165,
+ .key_start_idx = 230,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 256,
+ .result_start_idx = 282,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 9,
+ .ident_start_idx = 10,
.ident_nums = 1
},
{ /* class_tid: 5, wh_plus, table: l2_cntxt_tcam_cache.egr_wr */
@@ -769,16 +839,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
- .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .key_start_idx = 178,
+ .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE,
+ .fdb_operand = BNXT_ULP_RF_IDX_RID,
+ .key_start_idx = 243,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 269,
+ .result_start_idx = 295,
.result_bit_size = 62,
.result_num_fields = 4,
.encap_num_fields = 0
@@ -790,13 +861,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_PARIF,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .result_start_idx = 273,
+ .result_start_idx = 299,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0
@@ -808,13 +879,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_PARIF,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .result_start_idx = 274,
+ .result_start_idx = 300,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0
@@ -826,13 +897,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_PARIF,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
- .result_start_idx = 275,
+ .result_start_idx = 301,
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0
@@ -846,14 +917,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 1,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG,
- .result_start_idx = 276,
+ .result_start_idx = 302,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0
@@ -865,7 +936,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 0,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
@@ -875,15 +946,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .key_start_idx = 179,
+ .key_start_idx = 244,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 302,
+ .result_start_idx = 328,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 10,
+ .ident_start_idx = 11,
.ident_nums = 0
},
{ /* class_tid: 6, wh_plus, table: int_full_act_record.0 */
@@ -895,14 +966,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.execute_info = {
.cond_goto = 0,
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
- .cond_start_idx = 10,
+ .cond_start_idx = 14,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
.tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR,
.accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .result_start_idx = 315,
+ .result_start_idx = 341,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0
@@ -910,10 +981,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
};
struct bnxt_ulp_mapper_cond_info ulp_wh_plus_class_cond_list[] = {
- {
- .cond_opcode = BNXT_ULP_COND_OPC_FIELD_BIT_NOT_SET,
- .cond_operand = BNXT_ULP_GLB_HF_ID_O_ETH_DMAC
- },
{
.cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
.cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT
@@ -927,6 +994,18 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_class_cond_list[] = {
.cond_operand = BNXT_ULP_HDR_BIT_O_IPV4
},
{
+ .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_HDR_BIT_O_IPV6
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_HDR_BIT_O_IPV6
+ },
+ {
.cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET,
.cond_operand = BNXT_ULP_CF_IDX_VFR_MODE
},
@@ -949,31 +1028,18 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_class_cond_list[] = {
{
.cond_opcode = BNXT_ULP_COND_OPC_RF_NOT_SET,
.cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_RF_NOT_SET,
+ .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT
+ },
+ {
+ .cond_opcode = BNXT_ULP_COND_OPC_RF_NOT_SET,
+ .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT
}
};
struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
- /* class_tid: 1, wh_plus, table: l2_cntxt_tcam_cache.rd */
- {
- .field_info_mask = {
- .description = "svif",
- .field_bit_size = 8,
- .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_HF,
- .field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
- },
- .field_info_spec = {
- .description = "svif",
- .field_bit_size = 8,
- .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_HF,
- .field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
- }
- },
/* class_tid: 1, wh_plus, table: l2_cntxt_tcam.0 */
{
.field_info_mask = {
@@ -1241,7 +1307,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff}
}
},
- /* class_tid: 1, wh_plus, table: profile_tcam.0 */
+ /* class_tid: 1, wh_plus, table: profile_tcam.ipv4_0 */
{
.field_info_mask = {
.description = "l4_hdr_is_udp_tcp",
@@ -1374,22 +1440,8 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
.field_info_spec = {
.description = "l3_hdr_type",
.field_bit_size = 4,
- .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
- .field_cond_opr = {
- ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
- (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_L3_HDR_TYPE_IPV4},
- .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr2 = {
- ULP_WP_SYM_L3_HDR_TYPE_IPV6}
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
@@ -1926,281 +1978,1181 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
1}
}
},
- /* class_tid: 1, wh_plus, table: profile_tcam_cache.wr */
+ /* class_tid: 1, wh_plus, table: profile_tcam.ipv6_0 */
{
.field_info_mask = {
- .description = "recycle_cnt",
- .field_bit_size = 2,
+ .description = "l4_hdr_is_udp_tcp",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- 0xff}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
.field_info_spec = {
- .description = "recycle_cnt",
- .field_bit_size = 2,
+ .description = "l4_hdr_is_udp_tcp",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
.field_info_mask = {
- .description = "prof_func_id",
- .field_bit_size = 7,
+ .description = "l4_hdr_type",
+ .field_bit_size = 4,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
0xff}
},
.field_info_spec = {
- .description = "prof_func_id",
- .field_bit_size = 7,
+ .description = "l4_hdr_type",
+ .field_bit_size = 4,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_L4_HDR_TYPE_TCP},
+ .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr2 = {
+ ULP_WP_SYM_L4_HDR_TYPE_UDP}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "l4_hdr_error",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "l4_hdr_error",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
.field_info_mask = {
- .description = "hdr_sig_id",
- .field_bit_size = 5,
+ .description = "l4_hdr_valid",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
0xff}
},
.field_info_spec = {
- .description = "hdr_sig_id",
- .field_bit_size = 5,
+ .description = "l4_hdr_valid",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- (BNXT_ULP_CF_IDX_HDR_SIG_ID >> 8) & 0xff,
- BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff}
+ ULP_WP_SYM_L4_HDR_VALID_YES}
}
},
- /* class_tid: 1, wh_plus, table: em.int_0 */
{
.field_info_mask = {
- .description = "spare",
- .field_bit_size = 3,
+ .description = "l3_ipv6_cmp_dst",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
.field_info_spec = {
- .description = "spare",
- .field_bit_size = 3,
+ .description = "l3_ipv6_cmp_dst",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
.field_info_mask = {
- .description = "local_cos",
- .field_bit_size = 3,
+ .description = "l3_ipv6_cmp_src",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- 0xff}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
.field_info_spec = {
- .description = "local_cos",
- .field_bit_size = 3,
+ .description = "l3_ipv6_cmp_src",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
.field_info_mask = {
- .description = "o_l4.dport",
- .field_bit_size = 16,
+ .description = "l3_hdr_isIP",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "l3_hdr_isIP",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "l3_hdr_type",
+ .field_bit_size = 4,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- 0xff,
0xff}
},
.field_info_spec = {
- .description = "o_l4.dport",
- .field_bit_size = 16,
- .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
- .field_cond_opr = {
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
- (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
- .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .description = "l3_hdr_type",
+ .field_bit_size = 4,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff},
- .field_src2 = BNXT_ULP_FIELD_SRC_HF,
- .field_opr2 = {
- (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff}
+ ULP_WP_SYM_L3_HDR_TYPE_IPV6}
}
},
{
.field_info_mask = {
- .description = "o_l4.sport",
- .field_bit_size = 16,
+ .description = "l3_hdr_error",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- 0xff,
0xff}
},
.field_info_spec = {
- .description = "o_l4.sport",
- .field_bit_size = 16,
- .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
- .field_cond_opr = {
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
- (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
- .field_src1 = BNXT_ULP_FIELD_SRC_HF,
- .field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff},
- .field_src2 = BNXT_ULP_FIELD_SRC_HF,
- .field_opr2 = {
- (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff}
+ .description = "l3_hdr_error",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
.field_info_mask = {
- .description = "o_ipv4.ip_proto",
- .field_bit_size = 8,
+ .description = "l3_hdr_valid",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
0xff}
},
.field_info_spec = {
- .description = "o_ipv4.ip_proto",
- .field_bit_size = 8,
- .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
- .field_cond_opr = {
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
- ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
- (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .description = "l3_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- ULP_WP_SYM_IP_PROTO_TCP},
- .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr2 = {
- ULP_WP_SYM_IP_PROTO_UDP}
+ ULP_WP_SYM_L3_HDR_VALID_YES}
}
},
{
.field_info_mask = {
- .description = "o_ipv4.dst",
- .field_bit_size = 32,
+ .description = "l2_two_vtags",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+ 0xff}
},
.field_info_spec = {
- .description = "o_ipv4.dst",
- .field_bit_size = 32,
+ .description = "l2_two_vtags",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_HF,
- .field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
.field_info_mask = {
- .description = "o_ipv4.src",
- .field_bit_size = 32,
+ .description = "l2_vtag_present",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff}
+ 0xff}
},
.field_info_spec = {
- .description = "o_ipv4.src",
- .field_bit_size = 32,
+ .description = "l2_vtag_present",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CF,
.field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff}
+ (BNXT_ULP_CF_IDX_O_ONE_VTAG >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_O_ONE_VTAG & 0xff}
}
},
{
.field_info_mask = {
- .description = "o_eth.smac",
- .field_bit_size = 48,
+ .description = "l2_uc_mc_bc",
+ .field_bit_size = 2,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- 0xff,
- 0xff,
- 0xff,
- 0xff,
- 0xff,
0xff}
},
.field_info_spec = {
- .description = "o_eth.smac",
- .field_bit_size = 48,
+ .description = "l2_uc_mc_bc",
+ .field_bit_size = 2,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
.field_info_mask = {
- .description = "l2_cntxt_id",
- .field_bit_size = 10,
+ .description = "l2_hdr_type",
+ .field_bit_size = 2,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- 0xff,
0xff}
},
.field_info_spec = {
- .description = "l2_cntxt_id",
- .field_bit_size = 10,
+ .description = "l2_hdr_type",
+ .field_bit_size = 2,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_RF,
- .field_opr1 = {
- (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
- BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
.field_info_mask = {
- .description = "em_profile_id",
- .field_bit_size = 8,
+ .description = "l2_hdr_error",
+ .field_bit_size = 1,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
0xff}
},
.field_info_spec = {
- .description = "em_profile_id",
- .field_bit_size = 8,
+ .description = "l2_hdr_error",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "l2_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "l2_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_L2_HDR_VALID_YES}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tun_hdr_flags",
+ .field_bit_size = 3,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tun_hdr_flags",
+ .field_bit_size = 3,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tun_hdr_type",
+ .field_bit_size = 4,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tun_hdr_type",
+ .field_bit_size = 4,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tun_hdr_err",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tun_hdr_err",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tun_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "tun_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl4_hdr_is_udp_tcp",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl4_hdr_is_udp_tcp",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl4_hdr_type",
+ .field_bit_size = 4,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl4_hdr_type",
+ .field_bit_size = 4,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl4_hdr_error",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl4_hdr_error",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl4_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "tl4_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl3_ipv6_cmp_dst",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl3_ipv6_cmp_dst",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl3_ipv6_cmp_src",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl3_ipv6_cmp_src",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl3_hdr_isIP",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl3_hdr_isIP",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl3_hdr_type",
+ .field_bit_size = 4,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl3_hdr_type",
+ .field_bit_size = 4,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl3_hdr_error",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl3_hdr_error",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl3_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "tl3_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl2_two_vtags",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl2_two_vtags",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl2_vtag_present",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl2_vtag_present",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl2_uc_mc_bc",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl2_uc_mc_bc",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl2_hdr_type",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "tl2_hdr_type",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "tl2_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "tl2_hdr_valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "hrec_next",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "hrec_next",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "reserved",
+ .field_bit_size = 9,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "reserved",
+ .field_bit_size = 9,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "prof_func_id",
+ .field_bit_size = 7,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "prof_func_id",
+ .field_bit_size = 7,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "agg_error",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "agg_error",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "recycle_cnt",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "recycle_cnt",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "pkt_type_0",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "pkt_type_0",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "pkt_type_1",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "pkt_type_1",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 1}
+ }
+ },
+ /* class_tid: 1, wh_plus, table: profile_tcam_cache.wr */
+ {
+ .field_info_mask = {
+ .description = "recycle_cnt",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "recycle_cnt",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "prof_func_id",
+ .field_bit_size = 7,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "prof_func_id",
+ .field_bit_size = 7,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "hdr_sig_id",
+ .field_bit_size = 5,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "hdr_sig_id",
+ .field_bit_size = 5,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+ .field_opr1 = {
+ (BNXT_ULP_CF_IDX_HDR_SIG_ID >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff}
+ }
+ },
+ /* class_tid: 1, wh_plus, table: em.ipv4_0 */
+ {
+ .field_info_mask = {
+ .description = "spare",
+ .field_bit_size = 3,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "spare",
+ .field_bit_size = 3,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "local_cos",
+ .field_bit_size = 3,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "local_cos",
+ .field_bit_size = 3,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_l4.dport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_l4.dport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr2 = {
+ (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_l4.sport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_l4.sport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr2 = {
+ (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_ipv4.ip_proto",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_ipv4.ip_proto",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_IP_PROTO_TCP},
+ .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr2 = {
+ ULP_WP_SYM_IP_PROTO_UDP}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_ipv4.dst",
+ .field_bit_size = 32,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_ipv4.dst",
+ .field_bit_size = 32,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_ipv4.src",
+ .field_bit_size = 32,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_ipv4.src",
+ .field_bit_size = 32,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_eth.smac",
+ .field_bit_size = 48,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_eth.smac",
+ .field_bit_size = 48,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "l2_cntxt_id",
+ .field_bit_size = 10,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "l2_cntxt_id",
+ .field_bit_size = 10,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "em_profile_id",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "em_profile_id",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
+ }
+ },
+ /* class_tid: 1, wh_plus, table: eem.ipv4_0 */
+ {
+ .field_info_mask = {
+ .description = "spare",
+ .field_bit_size = 275,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "spare",
+ .field_bit_size = 275,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "local_cos",
+ .field_bit_size = 3,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "local_cos",
+ .field_bit_size = 3,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_l4.dport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_l4.dport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr2 = {
+ (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_l4.sport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_l4.sport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr2 = {
+ (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_ipv4.ip_proto",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_ipv4.ip_proto",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_IP_PROTO_TCP},
+ .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr2 = {
+ ULP_WP_SYM_IP_PROTO_UDP}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_ipv4.dst",
+ .field_bit_size = 32,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_ipv4.dst",
+ .field_bit_size = 32,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_ipv4.src",
+ .field_bit_size = 32,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_ipv4.src",
+ .field_bit_size = 32,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_eth.smac",
+ .field_bit_size = 48,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_eth.smac",
+ .field_bit_size = 48,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "l2_cntxt_id",
+ .field_bit_size = 10,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "l2_cntxt_id",
+ .field_bit_size = 10,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "em_profile_id",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "em_profile_id",
+ .field_bit_size = 8,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_RF,
.field_opr1 = {
@@ -2208,17 +3160,17 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
}
},
- /* class_tid: 1, wh_plus, table: eem.ext_0 */
+ /* class_tid: 1, wh_plus, table: em.ipv6_0 */
{
.field_info_mask = {
.description = "spare",
- .field_bit_size = 275,
+ .field_bit_size = 3,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
.field_info_spec = {
.description = "spare",
- .field_bit_size = 275,
+ .field_bit_size = 3,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
@@ -2307,7 +3259,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
},
{
.field_info_mask = {
- .description = "o_ipv4.ip_proto",
+ .description = "o_ipv6.ip_proto",
.field_bit_size = 8,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
@@ -2315,7 +3267,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
0xff}
},
.field_info_spec = {
- .description = "o_ipv4.ip_proto",
+ .description = "o_ipv6.ip_proto",
.field_bit_size = 8,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
.field_cond_opr = {
@@ -2337,42 +3289,290 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
},
{
.field_info_mask = {
- .description = "o_ipv4.dst",
- .field_bit_size = 32,
+ .description = "o_ipv6.dst",
+ .field_bit_size = 128,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_HF,
.field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+ (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff}
},
.field_info_spec = {
- .description = "o_ipv4.dst",
- .field_bit_size = 32,
+ .description = "o_ipv6.dst",
+ .field_bit_size = 128,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_HF,
.field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+ (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff}
}
},
{
.field_info_mask = {
- .description = "o_ipv4.src",
- .field_bit_size = 32,
+ .description = "o_ipv6.src",
+ .field_bit_size = 128,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_ipv6.src",
+ .field_bit_size = 128,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_eth.smac",
+ .field_bit_size = 48,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_eth.smac",
+ .field_bit_size = 48,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_eth.dmac",
+ .field_bit_size = 48,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_eth.dmac",
+ .field_bit_size = 48,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "l2_cntxt_id",
+ .field_bit_size = 10,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "l2_cntxt_id",
+ .field_bit_size = 10,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "em_profile_id",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "em_profile_id",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
+ }
+ },
+ /* class_tid: 1, wh_plus, table: eem.ipv6_0 */
+ {
+ .field_info_mask = {
+ .description = "spare",
+ .field_bit_size = 35,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ .field_info_spec = {
+ .description = "spare",
+ .field_bit_size = 35,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "local_cos",
+ .field_bit_size = 3,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "local_cos",
+ .field_bit_size = 3,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_l4.dport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_l4.dport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr2 = {
+ (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_l4.sport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_l4.sport",
+ .field_bit_size = 16,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr2 = {
+ (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_ipv6.ip_proto",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_ipv6.ip_proto",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT,
+ .field_cond_opr = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_IP_PROTO_TCP},
+ .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr2 = {
+ ULP_WP_SYM_IP_PROTO_UDP}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_ipv6.dst",
+ .field_bit_size = 128,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_ipv6.dst",
+ .field_bit_size = 128,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+ .field_opr1 = {
+ (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff}
+ }
+ },
+ {
+ .field_info_mask = {
+ .description = "o_ipv6.src",
+ .field_bit_size = 128,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_HF,
.field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff}
+ (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff}
},
.field_info_spec = {
- .description = "o_ipv4.src",
- .field_bit_size = 32,
+ .description = "o_ipv6.src",
+ .field_bit_size = 128,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_HF,
.field_opr1 = {
- (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff}
+ (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff}
}
},
{
@@ -2397,6 +3597,27 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
}
},
{
+ .field_info_mask = {
+ .description = "o_eth.dmac",
+ .field_bit_size = 48,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff,
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "o_eth.dmac",
+ .field_bit_size = 48,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ }
+ },
+ {
.field_info_mask = {
.description = "l2_cntxt_id",
.field_bit_size = 10,
@@ -3077,6 +4298,26 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff}
}
},
+ /* class_tid: 4, wh_plus, table: l2_cntxt_tcam_cache.rd_egr0 */
+ {
+ .field_info_mask = {
+ .description = "svif",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 0xff}
+ },
+ .field_info_spec = {
+ .description = "svif",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+ .field_opr1 = {
+ (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff}
+ }
+ },
/* class_tid: 4, wh_plus, table: l2_cntxt_tcam_bypass.egr0 */
{
.field_info_mask = {
@@ -4208,14 +5449,12 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
- /* class_tid: 1, wh_plus, table: profile_tcam.0 */
+ /* class_tid: 1, wh_plus, table: profile_tcam.ipv4_0 */
{
.description = "wc_key_id",
.field_bit_size = 4,
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- 3}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
.description = "wc_profile_id",
@@ -4269,6 +5508,65 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {
.field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
+ /* class_tid: 1, wh_plus, table: profile_tcam.ipv6_0 */
+ {
+ .description = "wc_key_id",
+ .field_bit_size = 4,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "wc_profile_id",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "wc_search_en",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "em_key_mask",
+ .field_bit_size = 10,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ (249 >> 8) & 0xff,
+ 249 & 0xff}
+ },
+ {
+ .description = "em_key_id",
+ .field_bit_size = 5,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 7}
+ },
+ {
+ .description = "em_profile_id",
+ .field_bit_size = 8,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
+ },
+ {
+ .description = "em_search_en",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 1}
+ },
+ {
+ .description = "pl_byp_lkup_en",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
/* class_tid: 1, wh_plus, table: profile_tcam_cache.wr */
{
.description = "rid",
@@ -4312,7 +5610,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {
(BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff,
BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff}
},
- /* class_tid: 1, wh_plus, table: em.int_0 */
+ /* class_tid: 1, wh_plus, table: em.ipv4_0 */
{
.description = "act_rec_ptr",
.field_bit_size = 33,
@@ -4374,7 +5672,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {
.field_opr1 = {
1}
},
- /* class_tid: 1, wh_plus, table: eem.ext_0 */
+ /* class_tid: 1, wh_plus, table: eem.ipv4_0 */
{
.description = "act_rec_ptr",
.field_bit_size = 33,
@@ -4444,6 +5742,138 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {
.field_opr1 = {
1}
},
+ /* class_tid: 1, wh_plus, table: em.ipv6_0 */
+ {
+ .description = "act_rec_ptr",
+ .field_bit_size = 33,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+ },
+ {
+ .description = "ext_flow_cntr",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "act_rec_int",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "act_rec_size",
+ .field_bit_size = 5,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "key_size",
+ .field_bit_size = 9,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "reserved",
+ .field_bit_size = 11,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "strength",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 3}
+ },
+ {
+ .description = "l1_cacheable",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 1}
+ },
+ /* class_tid: 1, wh_plus, table: eem.ipv6_0 */
+ {
+ .description = "act_rec_ptr",
+ .field_bit_size = 33,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+ },
+ {
+ .description = "ext_flow_cntr",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "act_rec_int",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_EEM_ACT_REC_INT}
+ },
+ {
+ .description = "act_rec_size",
+ .field_bit_size = 5,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+ .field_opr1 = {
+ (BNXT_ULP_RF_IDX_ACTION_REC_SIZE >> 8) & 0xff,
+ BNXT_ULP_RF_IDX_ACTION_REC_SIZE & 0xff}
+ },
+ {
+ .description = "key_size",
+ .field_bit_size = 9,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ (413 >> 8) & 0xff,
+ 413 & 0xff}
+ },
+ {
+ .description = "reserved",
+ .field_bit_size = 11,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "strength",
+ .field_bit_size = 2,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 3}
+ },
+ {
+ .description = "l1_cacheable",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ },
+ {
+ .description = "valid",
+ .field_bit_size = 1,
+ .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE,
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 1}
+ },
/* class_tid: 2, wh_plus, table: int_full_act_record.0 */
{
.description = "flow_cntr_ptr",
@@ -6417,13 +7847,6 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {
};
struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = {
- /* class_tid: 1, wh_plus, table: l2_cntxt_tcam_cache.rd */
- {
- .description = "l2_cntxt_id",
- .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0,
- .ident_bit_size = 10,
- .ident_bit_pos = 42
- },
/* class_tid: 1, wh_plus, table: l2_cntxt_tcam.0 */
{
.description = "l2_cntxt_id",
@@ -6435,6 +7858,12 @@ struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = {
},
/* class_tid: 1, wh_plus, table: profile_tcam_cache.rd */
{
+ .description = "flow_sig_id",
+ .regfile_idx = BNXT_ULP_RF_IDX_FLOW_SIG_ID,
+ .ident_bit_size = 8,
+ .ident_bit_pos = 58
+ },
+ {
.description = "profile_tcam_index",
.regfile_idx = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0,
.ident_bit_size = 10,
@@ -6446,13 +7875,16 @@ struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = {
.ident_bit_size = 8,
.ident_bit_pos = 42
},
+ /* class_tid: 1, wh_plus, table: profile_tcam.ipv4_0 */
{
- .description = "flow_sig_id",
- .regfile_idx = BNXT_ULP_RF_IDX_FLOW_SIG_ID,
+ .description = "em_profile_id",
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_RF_IDX_EM_PROFILE_ID_0,
.ident_bit_size = 8,
- .ident_bit_pos = 58
+ .ident_bit_pos = 28
},
- /* class_tid: 1, wh_plus, table: profile_tcam.0 */
+ /* class_tid: 1, wh_plus, table: profile_tcam.ipv6_0 */
{
.description = "em_profile_id",
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -6486,6 +7918,13 @@ struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = {
.ident_bit_size = 10,
.ident_bit_pos = 0
},
+ /* class_tid: 4, wh_plus, table: l2_cntxt_tcam_cache.rd_egr0 */
+ {
+ .description = "l2_cntxt_tcam_index",
+ .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 32
+ },
/* class_tid: 5, wh_plus, table: l2_cntxt_tcam.egr */
{
.description = "l2_cntxt_id",