[v1,1/2] net/i40e: improve performance for scalar Tx
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Commit Message
For i40e scalar Tx path, if implement FAST_FREE_MBUF mode, it means
per-queue all mbufs come from the same mempool and have refcnt = 1.
Thus we can use bulk free of the buffers when mbuf fast free mode is
enabled.
For scalar path in arm platform:
In n1sdp, performance is improved by 7.8%;
In thunderx2, performance is improved by 6.7%.
For scalar path in x86 platform,
performance is improved by 6%.
Suggested-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
---
drivers/net/i40e/i40e_rxtx.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
Comments
> -----Original Message-----
> From: Feifei Wang <feifei.wang2@arm.com>
> Sent: Thursday, May 27, 2021 4:17 PM
> To: Xing, Beilei <beilei.xing@intel.com>
> Cc: dev@dpdk.org; nd@arm.com; Feifei Wang <feifei.wang2@arm.com>;
> Ruifeng Wang <ruifeng.wang@arm.com>
> Subject: [PATCH v1 1/2] net/i40e: improve performance for scalar Tx
>
> For i40e scalar Tx path, if implement FAST_FREE_MBUF mode, it means per-
> queue all mbufs come from the same mempool and have refcnt = 1.
>
> Thus we can use bulk free of the buffers when mbuf fast free mode is
> enabled.
>
> For scalar path in arm platform:
> In n1sdp, performance is improved by 7.8%; In thunderx2, performance is
> improved by 6.7%.
>
> For scalar path in x86 platform,
> performance is improved by 6%.
>
> Suggested-by: Ruifeng Wang <ruifeng.wang@arm.com>
> Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
> ---
> drivers/net/i40e/i40e_rxtx.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index
> 6c58decece..fe7b20f750 100644
> --- a/drivers/net/i40e/i40e_rxtx.c
> +++ b/drivers/net/i40e/i40e_rxtx.c
> @@ -1295,6 +1295,7 @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq) {
> struct i40e_tx_entry *txep;
> uint16_t i;
> + struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
>
> if ((txq->tx_ring[txq->tx_next_dd].cmd_type_offset_bsz &
> rte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) !=
> @@ -1308,9 +1309,11 @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq)
>
> if (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE) {
> for (i = 0; i < txq->tx_rs_thresh; ++i, ++txep) {
> - rte_mempool_put(txep->mbuf->pool, txep->mbuf);
> + free[i] = txep->mbuf;
The tx_rs_thresh can be 'nb_desc - 3', so if tx_rs_thres > RTE_I40E_TX_MAX_FREE_BUF_SZ, there'll be out of bounds, right?
> txep->mbuf = NULL;
> }
> + rte_mempool_put_bulk(free[0]->pool, (void **)free,
> + txq->tx_rs_thresh);
> } else {
> for (i = 0; i < txq->tx_rs_thresh; ++i, ++txep) {
> rte_pktmbuf_free_seg(txep->mbuf);
> --
> 2.25.1
Hi, Beilei
Thanks for your comments, please see below.
> -----邮件原件-----
> 发件人: Xing, Beilei <beilei.xing@intel.com>
> 发送时间: 2021年6月22日 14:08
> 收件人: Feifei Wang <Feifei.Wang2@arm.com>
> 抄送: dev@dpdk.org; nd <nd@arm.com>; Ruifeng Wang
> <Ruifeng.Wang@arm.com>
> 主题: RE: [PATCH v1 1/2] net/i40e: improve performance for scalar Tx
>
>
>
> > -----Original Message-----
> > From: Feifei Wang <feifei.wang2@arm.com>
> > Sent: Thursday, May 27, 2021 4:17 PM
> > To: Xing, Beilei <beilei.xing@intel.com>
> > Cc: dev@dpdk.org; nd@arm.com; Feifei Wang <feifei.wang2@arm.com>;
> > Ruifeng Wang <ruifeng.wang@arm.com>
> > Subject: [PATCH v1 1/2] net/i40e: improve performance for scalar Tx
> >
> > For i40e scalar Tx path, if implement FAST_FREE_MBUF mode, it means
> > per- queue all mbufs come from the same mempool and have refcnt = 1.
> >
> > Thus we can use bulk free of the buffers when mbuf fast free mode is
> > enabled.
> >
> > For scalar path in arm platform:
> > In n1sdp, performance is improved by 7.8%; In thunderx2, performance
> > is improved by 6.7%.
> >
> > For scalar path in x86 platform,
> > performance is improved by 6%.
> >
> > Suggested-by: Ruifeng Wang <ruifeng.wang@arm.com>
> > Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
> > ---
> > drivers/net/i40e/i40e_rxtx.c | 5 ++++-
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/i40e/i40e_rxtx.c
> > b/drivers/net/i40e/i40e_rxtx.c index
> > 6c58decece..fe7b20f750 100644
> > --- a/drivers/net/i40e/i40e_rxtx.c
> > +++ b/drivers/net/i40e/i40e_rxtx.c
> > @@ -1295,6 +1295,7 @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq) {
> > struct i40e_tx_entry *txep;
> > uint16_t i;
> > + struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
> >
> > if ((txq->tx_ring[txq->tx_next_dd].cmd_type_offset_bsz &
> >
> rte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) != @@ -1308,9
> +1309,11
> > @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq)
> >
> > if (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE) {
> > for (i = 0; i < txq->tx_rs_thresh; ++i, ++txep) {
> > - rte_mempool_put(txep->mbuf->pool, txep->mbuf);
> > + free[i] = txep->mbuf;
>
> The tx_rs_thresh can be 'nb_desc - 3', so if tx_rs_thres >
> RTE_I40E_TX_MAX_FREE_BUF_SZ, there'll be out of bounds, right?
Actually tx_rs_thresh <= tx__free_thresh < nb_desc - 3 (i40e_dev_tx_queue_setup).
However, I don't know how it affects the relationship between tx_rs_thresh and
RTE_I40E_TX_MAX_FREE_BUF_SZ.
Furthermore, I think you are right that tx_rs_thres can be greater than
RTE_I40E_TX_MAX_FREE_BUF_SZ in tx_simple_mode (i40e_set_tx_function_flag).
Thus, in scalar path, we can change like:
---------------------------------------------------------------------------------------------------------------
int n = txq->tx_rs_thresh;
int32_t i = 0, j = 0;
const int32_t k = RTE_ALIGN_FLOOR(n, RTE_I40E_TX_MAX_FREE_BUF_SZ);
const int32_t m = n % RTE_I40E_TX_MAX_FREE_BUF_SZ;
struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
For FAST_FREE_MODE:
if (k) {
for (j = 0; j != k - RTE_I40E_TX_MAX_FREE_BUF_SZ;
j += RTE_I40E_TX_MAX_FREE_BUF_SZ) {
for (i = 0; i <RTE_I40E_TX_MAX_FREE_BUF_SZ; ++i, ++txep) {
free[i] = txep->mbuf;
txep->mbuf = NULL;
}
rte_mempool_put_bulk(free[0]->pool, (void **)free,
RTE_I40E_TX_MAX_FREE_BUF_SZ);
}
} else {
for (i = 0; i < m; ++i, ++txep) {
free[i] = txep->mbuf;
txep->mbuf = NULL;
}
rte_mempool_put_bulk(free[0]->pool, (void **)free, m);
}
---------------------------------------------------------------------------------------------------------------
Best Regards
Feifei
Sorry for a mistake for the code, it should be:
------------------------------------------------------------------------------------------------
int n = txq->tx_rs_thresh;
int32_t i = 0, j = 0;
const int32_t k = RTE_ALIGN_FLOOR(n, RTE_I40E_TX_MAX_FREE_BUF_SZ);
const int32_t m = n % RTE_I40E_TX_MAX_FREE_BUF_SZ;
struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
For FAST_FREE_MODE:
if (k) {
for (j = 0; j != k - RTE_I40E_TX_MAX_FREE_BUF_SZ;
j += RTE_I40E_TX_MAX_FREE_BUF_SZ) {
for (i = 0; i <RTE_I40E_TX_MAX_FREE_BUF_SZ; ++i, ++txep) {
free[i] = txep->mbuf;
txep->mbuf = NULL;
}
rte_mempool_put_bulk(free[0]->pool, (void **)free,
RTE_I40E_TX_MAX_FREE_BUF_SZ);
}
}
if (m) {
for (i = 0; i < m; ++i, ++txep) {
free[i] = txep->mbuf;
txep->mbuf = NULL;
}
}
rte_mempool_put_bulk(free[0]->pool, (void **)free, m); }
------------------------------------------------------------------------------------------------
> -----Original Message-----
> From: Feifei Wang <Feifei.Wang2@arm.com>
> Sent: Tuesday, June 22, 2021 6:08 PM
> To: Xing, Beilei <beilei.xing@intel.com>
> Cc: dev@dpdk.org; nd <nd@arm.com>; Ruifeng Wang
> <Ruifeng.Wang@arm.com>; nd <nd@arm.com>
> Subject: 回复: [PATCH v1 1/2] net/i40e: improve performance for scalar Tx
>
> Sorry for a mistake for the code, it should be:
> ------------------------------------------------------------------------------------------------
> int n = txq->tx_rs_thresh;
> int32_t i = 0, j = 0;
> const int32_t k = RTE_ALIGN_FLOOR(n, RTE_I40E_TX_MAX_FREE_BUF_SZ);
> const int32_t m = n % RTE_I40E_TX_MAX_FREE_BUF_SZ; struct rte_mbuf
> *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
>
> For FAST_FREE_MODE:
>
> if (k) {
> for (j = 0; j != k - RTE_I40E_TX_MAX_FREE_BUF_SZ;
> j += RTE_I40E_TX_MAX_FREE_BUF_SZ) {
> for (i = 0; i <RTE_I40E_TX_MAX_FREE_BUF_SZ; ++i, ++txep) {
> free[i] = txep->mbuf;
> txep->mbuf = NULL;
> }
> rte_mempool_put_bulk(free[0]->pool, (void **)free,
> RTE_I40E_TX_MAX_FREE_BUF_SZ);
> }
> }
>
> if (m) {
> for (i = 0; i < m; ++i, ++txep) {
> free[i] = txep->mbuf;
> txep->mbuf = NULL;
> }
> }
> rte_mempool_put_bulk(free[0]->pool, (void **)free, m); }
> ------------------------------------------------------------------------------------------------
Seems no logical problem, but the code looks heavy due to for loops.
Did you run performance with this change when tx_rs_thresh > RTE_I40E_TX_MAX_FREE_BUF_SZ?
<snip>
> > int n = txq->tx_rs_thresh;
> > int32_t i = 0, j = 0;
> > const int32_t k = RTE_ALIGN_FLOOR(n, RTE_I40E_TX_MAX_FREE_BUF_SZ);
> > const int32_t m = n % RTE_I40E_TX_MAX_FREE_BUF_SZ; struct rte_mbuf
> > *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
> >
> > For FAST_FREE_MODE:
> >
> > if (k) {
> > for (j = 0; j != k - RTE_I40E_TX_MAX_FREE_BUF_SZ;
> > j += RTE_I40E_TX_MAX_FREE_BUF_SZ) {
> > for (i = 0; i <RTE_I40E_TX_MAX_FREE_BUF_SZ; ++i, ++txep) {
> > free[i] = txep->mbuf;
> > txep->mbuf = NULL;
> > }
> > rte_mempool_put_bulk(free[0]->pool, (void **)free,
> > RTE_I40E_TX_MAX_FREE_BUF_SZ);
> > }
> > }
> >
> > if (m) {
> > for (i = 0; i < m; ++i, ++txep) {
> > free[i] = txep->mbuf;
> > txep->mbuf = NULL;
> > }
> > }
> > rte_mempool_put_bulk(free[0]->pool, (void **)free, m); }
> Seems no logical problem, but the code looks heavy due to for loops.
> Did you run performance with this change when tx_rs_thresh >
> RTE_I40E_TX_MAX_FREE_BUF_SZ?
Sorry for my late rely. It takes me some time to do the test for this path and following
is my test results:
First, I come up with another way to solve this bug and compare it with "loop"(size of 'free' is 64).
That is set the size of 'free' as a large constant. We know:
tx_rs_thresh < ring_desc_size < I40E_MAX_RING_DESC(4096), so we can directly define as:
struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
[1]Test Config:
MRR Test: two porst & bi-directional flows & one core
RX API: i40e_recv_pkts_bulk_alloc
TX API: i40e_xmit_pkts_simple
ring_descs_size: 1024
Ring_I40E_TX_MAX_FREE_SZ: 64
[2]Scheme:
tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH
tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH
tx_rs_thresh <= tx_free_thresh < nb_tx_desc
So we change the value of 'tx_rs_thresh' by adjust I40E_DEFAULT_TX_RSBIT_THRESH
[3]Test Results (performance improve):
In X86:
tx_rs_thresh/ tx_free_thresh 32/32 256/256 512/512
1.mempool_put(base) 0 0 0
2.mempool_put_bulk:loop +4.7% +5.6% +7.0%
3.mempool_put_bulk:large size for free +3.8% +2.3% -2.0%
(free[I40E_MAX_RING_DESC])
In Arm:
N1SDP:
tx_rs_thresh/ tx_free_thresh 32/32 256/256 512/512
1.mempool_put(base) 0 0 0
2.mempool_put_bulk:loop +7.9% +9.1% +2.9%
3.mempool_put_bulk:large size for free +7.1% +8.7% +3.4%
(free[I40E_MAX_RING_DESC])
Thunderx2:
tx_rs_thresh/ tx_free_thresh 32/32 256/256 512/512
1.mempool_put(base) 0 0 0
2.mempool_put_bulk:loop +7.6% +10.5% +7.6%
3.mempool_put_bulk:large size for free +1.7% +18.4% +10.2%
(free[I40E_MAX_RING_DESC])
As a result, I feel maybe 'loop' is better and it seems not very heavy according to the test.
What about your views and look forward to your reply.
Thanks a lot.
> -----Original Message-----
> From: Feifei Wang <Feifei.Wang2@arm.com>
> Sent: Friday, June 25, 2021 5:40 PM
> To: Xing, Beilei <beilei.xing@intel.com>
> Cc: dev@dpdk.org; nd <nd@arm.com>; Ruifeng Wang
> <Ruifeng.Wang@arm.com>; nd <nd@arm.com>; nd <nd@arm.com>
> Subject: 回复: [PATCH v1 1/2] net/i40e: improve performance for scalar Tx
>
> <snip>
>
> > > int n = txq->tx_rs_thresh;
> > > int32_t i = 0, j = 0;
> > > const int32_t k = RTE_ALIGN_FLOOR(n, RTE_I40E_TX_MAX_FREE_BUF_SZ);
> > > const int32_t m = n % RTE_I40E_TX_MAX_FREE_BUF_SZ; struct rte_mbuf
> > > *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
> > >
> > > For FAST_FREE_MODE:
> > >
> > > if (k) {
> > > for (j = 0; j != k - RTE_I40E_TX_MAX_FREE_BUF_SZ;
> > > j += RTE_I40E_TX_MAX_FREE_BUF_SZ) {
> > > for (i = 0; i <RTE_I40E_TX_MAX_FREE_BUF_SZ; ++i, ++txep) {
> > > free[i] = txep->mbuf;
> > > txep->mbuf = NULL;
> > > }
> > > rte_mempool_put_bulk(free[0]->pool, (void **)free,
> > > RTE_I40E_TX_MAX_FREE_BUF_SZ);
> > > }
> > > }
> > >
> > > if (m) {
> > > for (i = 0; i < m; ++i, ++txep) {
> > > free[i] = txep->mbuf;
> > > txep->mbuf = NULL;
> > > }
> > > }
> > > rte_mempool_put_bulk(free[0]->pool, (void **)free, m); }
>
> > Seems no logical problem, but the code looks heavy due to for loops.
> > Did you run performance with this change when tx_rs_thresh >
> > RTE_I40E_TX_MAX_FREE_BUF_SZ?
>
> Sorry for my late rely. It takes me some time to do the test for this path and
> following is my test results:
>
> First, I come up with another way to solve this bug and compare it with
> "loop"(size of 'free' is 64).
> That is set the size of 'free' as a large constant. We know:
> tx_rs_thresh < ring_desc_size < I40E_MAX_RING_DESC(4096), so we can
> directly define as:
> struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
>
> [1]Test Config:
> MRR Test: two porst & bi-directional flows & one core RX API:
> i40e_recv_pkts_bulk_alloc TX API: i40e_xmit_pkts_simple
> ring_descs_size: 1024
> Ring_I40E_TX_MAX_FREE_SZ: 64
>
> [2]Scheme:
> tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH tx_free_thresh =
> I40E_DEFAULT_TX_FREE_THRESH tx_rs_thresh <= tx_free_thresh <
> nb_tx_desc So we change the value of 'tx_rs_thresh' by adjust
> I40E_DEFAULT_TX_RSBIT_THRESH
>
> [3]Test Results (performance improve):
> In X86:
> tx_rs_thresh/ tx_free_thresh 32/32 256/256 512/512
> 1.mempool_put(base) 0 0 0
> 2.mempool_put_bulk:loop +4.7% +5.6% +7.0%
> 3.mempool_put_bulk:large size for free +3.8% +2.3% -2.0%
> (free[I40E_MAX_RING_DESC])
>
> In Arm:
> N1SDP:
> tx_rs_thresh/ tx_free_thresh 32/32 256/256 512/512
> 1.mempool_put(base) 0 0 0
> 2.mempool_put_bulk:loop +7.9% +9.1% +2.9%
> 3.mempool_put_bulk:large size for free +7.1% +8.7% +3.4%
> (free[I40E_MAX_RING_DESC])
>
> Thunderx2:
> tx_rs_thresh/ tx_free_thresh 32/32 256/256 512/512
> 1.mempool_put(base) 0 0 0
> 2.mempool_put_bulk:loop +7.6% +10.5% +7.6%
> 3.mempool_put_bulk:large size for free +1.7% +18.4% +10.2%
> (free[I40E_MAX_RING_DESC])
>
> As a result, I feel maybe 'loop' is better and it seems not very heavy
> according to the test.
> What about your views and look forward to your reply.
> Thanks a lot.
Thanks for your patch and test.
It looks OK for me, please send V2.
> -----邮件原件-----
> 发件人: Xing, Beilei <beilei.xing@intel.com>
> 发送时间: 2021年6月28日 10:27
> 收件人: Feifei Wang <Feifei.Wang2@arm.com>
> 抄送: dev@dpdk.org; nd <nd@arm.com>; Ruifeng Wang
> <Ruifeng.Wang@arm.com>; nd <nd@arm.com>; nd <nd@arm.com>
> 主题: RE: [PATCH v1 1/2] net/i40e: improve performance for scalar Tx
>
>
>
> > -----Original Message-----
> > From: Feifei Wang <Feifei.Wang2@arm.com>
> > Sent: Friday, June 25, 2021 5:40 PM
> > To: Xing, Beilei <beilei.xing@intel.com>
> > Cc: dev@dpdk.org; nd <nd@arm.com>; Ruifeng Wang
> > <Ruifeng.Wang@arm.com>; nd <nd@arm.com>; nd <nd@arm.com>
> > Subject: 回复: [PATCH v1 1/2] net/i40e: improve performance for scalar
> > Tx
> >
> > <snip>
> >
> > > > int n = txq->tx_rs_thresh;
> > > > int32_t i = 0, j = 0;
> > > > const int32_t k = RTE_ALIGN_FLOOR(n,
> RTE_I40E_TX_MAX_FREE_BUF_SZ);
> > > > const int32_t m = n % RTE_I40E_TX_MAX_FREE_BUF_SZ; struct
> rte_mbuf
> > > > *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
> > > >
> > > > For FAST_FREE_MODE:
> > > >
> > > > if (k) {
> > > > for (j = 0; j != k - RTE_I40E_TX_MAX_FREE_BUF_SZ;
> > > > j += RTE_I40E_TX_MAX_FREE_BUF_SZ) {
> > > > for (i = 0; i <RTE_I40E_TX_MAX_FREE_BUF_SZ; ++i, ++txep) {
> > > > free[i] = txep->mbuf;
> > > > txep->mbuf = NULL;
> > > > }
> > > > rte_mempool_put_bulk(free[0]->pool, (void **)free,
> > > > RTE_I40E_TX_MAX_FREE_BUF_SZ);
> > > > }
> > > > }
> > > >
> > > > if (m) {
> > > > for (i = 0; i < m; ++i, ++txep) {
> > > > free[i] = txep->mbuf;
> > > > txep->mbuf = NULL;
> > > > }
> > > > }
> > > > rte_mempool_put_bulk(free[0]->pool, (void **)free, m); }
> >
> > > Seems no logical problem, but the code looks heavy due to for loops.
> > > Did you run performance with this change when tx_rs_thresh >
> > > RTE_I40E_TX_MAX_FREE_BUF_SZ?
> >
> > Sorry for my late rely. It takes me some time to do the test for this
> > path and following is my test results:
> >
> > First, I come up with another way to solve this bug and compare it
> > with "loop"(size of 'free' is 64).
> > That is set the size of 'free' as a large constant. We know:
> > tx_rs_thresh < ring_desc_size < I40E_MAX_RING_DESC(4096), so we can
> > directly define as:
> > struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
> >
> > [1]Test Config:
> > MRR Test: two porst & bi-directional flows & one core RX API:
> > i40e_recv_pkts_bulk_alloc TX API: i40e_xmit_pkts_simple
> > ring_descs_size: 1024
> > Ring_I40E_TX_MAX_FREE_SZ: 64
> >
> > [2]Scheme:
> > tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH tx_free_thresh =
> > I40E_DEFAULT_TX_FREE_THRESH tx_rs_thresh <= tx_free_thresh <
> > nb_tx_desc So we change the value of 'tx_rs_thresh' by adjust
> > I40E_DEFAULT_TX_RSBIT_THRESH
> >
> > [3]Test Results (performance improve):
> > In X86:
> > tx_rs_thresh/ tx_free_thresh 32/32 256/256 512/512
> > 1.mempool_put(base) 0 0 0
> > 2.mempool_put_bulk:loop +4.7% +5.6% +7.0%
> > 3.mempool_put_bulk:large size for free +3.8% +2.3% -2.0%
> > (free[I40E_MAX_RING_DESC])
> >
> > In Arm:
> > N1SDP:
> > tx_rs_thresh/ tx_free_thresh 32/32 256/256 512/512
> > 1.mempool_put(base) 0 0 0
> > 2.mempool_put_bulk:loop +7.9% +9.1% +2.9%
> > 3.mempool_put_bulk:large size for free +7.1% +8.7% +3.4%
> > (free[I40E_MAX_RING_DESC])
> >
> > Thunderx2:
> > tx_rs_thresh/ tx_free_thresh 32/32 256/256 512/512
> > 1.mempool_put(base) 0 0 0
> > 2.mempool_put_bulk:loop +7.6% +10.5% +7.6%
> > 3.mempool_put_bulk:large size for free +1.7% +18.4% +10.2%
> > (free[I40E_MAX_RING_DESC])
> >
> > As a result, I feel maybe 'loop' is better and it seems not very heavy
> > according to the test.
> > What about your views and look forward to your reply.
> > Thanks a lot.
>
> Thanks for your patch and test.
> It looks OK for me, please send V2.
Thanks for the reviewing, I will update the V2 version.
@@ -1295,6 +1295,7 @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq)
{
struct i40e_tx_entry *txep;
uint16_t i;
+ struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ];
if ((txq->tx_ring[txq->tx_next_dd].cmd_type_offset_bsz &
rte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) !=
@@ -1308,9 +1309,11 @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq)
if (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE) {
for (i = 0; i < txq->tx_rs_thresh; ++i, ++txep) {
- rte_mempool_put(txep->mbuf->pool, txep->mbuf);
+ free[i] = txep->mbuf;
txep->mbuf = NULL;
}
+ rte_mempool_put_bulk(free[0]->pool, (void **)free,
+ txq->tx_rs_thresh);
} else {
for (i = 0; i < txq->tx_rs_thresh; ++i, ++txep) {
rte_pktmbuf_free_seg(txep->mbuf);