diff mbox series

net/i40e: fix VF RSS configuration

Message ID 20210512054818.36076-1-alvinx.zhang@intel.com (mailing list archive)
State Superseded, archived
Headers show
Series net/i40e: fix VF RSS configuration | expand

Checks

Context Check Description
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-mellanox-Functional success Functional Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/intel-Testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Zhang, AlvinX May 12, 2021, 5:48 a.m. UTC
The kernel driver supports VF RSS configuration message
"VIRTCHNL_OP_GET_RSS_HENA_CAPS and VIRTCHNL_OP_SET_RSS_HENA",
this patch adds PMD support for these messages.

Fixes: b81295c474b0 ("net/i40e: add user callback for VF to PF message")
Cc: stable@dpdk.org

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
---
 drivers/net/i40e/i40e_pf.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

Comments

Xing, Beilei May 12, 2021, 6:16 a.m. UTC | #1
> -----Original Message-----
> From: Zhang, AlvinX <alvinx.zhang@intel.com>
> Sent: Wednesday, May 12, 2021 1:48 PM
> To: Xing, Beilei <beilei.xing@intel.com>; Xu, Ting <ting.xu@intel.com>
> Cc: dev@dpdk.org; Zhang, AlvinX <alvinx.zhang@intel.com>;
> stable@dpdk.org
> Subject: [PATCH] net/i40e: fix VF RSS configuration
> 
> The kernel driver supports VF RSS configuration message
> "VIRTCHNL_OP_GET_RSS_HENA_CAPS and VIRTCHNL_OP_SET_RSS_HENA",
> this patch adds PMD support for these messages.
> 
> Fixes: b81295c474b0 ("net/i40e: add user callback for VF to PF message")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
> ---
>  drivers/net/i40e/i40e_pf.c | 58
> ++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 58 insertions(+)
> 
> diff --git a/drivers/net/i40e/i40e_pf.c b/drivers/net/i40e/i40e_pf.c index
> 9804ed4..b18dc84 100644
> --- a/drivers/net/i40e/i40e_pf.c
> +++ b/drivers/net/i40e/i40e_pf.c
> @@ -29,6 +29,28 @@
> 
>  #define I40E_CFG_CRCSTRIP_DEFAULT 1
> 
> +/* Supported RSS offloads */
> +#define I40E_DEFAULT_RSS_HENA ( \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD))
> +
> +#define I40E_DEFAULT_RSS_HENA_EXPANDED (I40E_DEFAULT_RSS_HENA |
> \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \
> +	BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))
> +
>  static int
>  i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
>  			   struct virtchnl_queue_select *qsel, @@ -1288,6
> +1310,36 @@
>  				(u8 *)vfres, sizeof(*vfres));
>  }
> 
> +static int
> +i40e_pf_host_process_cmd_get_rss_hena(struct i40e_pf_vf *vf) {
> +	struct virtchnl_rss_hena vrh = {0};
> +	struct i40e_pf *pf = vf->pf;
> +
> +	if (pf->adapter->hw.mac.type == I40E_MAC_X722)
> +		vrh.hena = I40E_DEFAULT_RSS_HENA_EXPANDED;
> +	else
> +		vrh.hena = I40E_DEFAULT_RSS_HENA;
> +
> +	return i40e_pf_host_send_msg_to_vf(vf,
> VIRTCHNL_OP_GET_RSS_HENA_CAPS,
> +					   0, (u8 *)&vrh, sizeof(vrh));

Use uint8_t in PMD.

> +}
> +
> +static int
> +i40e_pf_host_process_cmd_set_rss_hena(struct i40e_pf_vf *vf, u8 *msg) {

Same above. And please check below.

> +	struct virtchnl_rss_hena *vrh =
> +		(struct virtchnl_rss_hena *)msg;
> +	struct i40e_hw *hw = &vf->pf->adapter->hw;
> +
> +	i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_idx), (u32)vrh-
> >hena);
> +	i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_idx),
> +			  (u32)(vrh->hena >> 32));
> +
> +	return i40e_pf_host_send_msg_to_vf(vf,
> VIRTCHNL_OP_SET_RSS_HENA,
> +					   0, NULL, 0);
> +}
> +
>  void
>  i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
>  			   uint16_t abs_vf_id, uint32_t opcode, @@ -1458,6
> +1510,12 @@
>  		PMD_DRV_LOG(INFO, "OP_REQUEST_QUEUES received");
>  		i40e_pf_host_process_cmd_request_queues(vf, msg);
>  		break;
> +	case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
> +		ret = i40e_pf_host_process_cmd_get_rss_hena(vf);
> +		break;
> +	case VIRTCHNL_OP_SET_RSS_HENA:
> +		ret = i40e_pf_host_process_cmd_set_rss_hena(vf, msg);
> +		break;
> 
>  	/* Don't add command supported below, which will
>  	 * return an error code.
> --
> 1.8.3.1
diff mbox series

Patch

diff --git a/drivers/net/i40e/i40e_pf.c b/drivers/net/i40e/i40e_pf.c
index 9804ed4..b18dc84 100644
--- a/drivers/net/i40e/i40e_pf.c
+++ b/drivers/net/i40e/i40e_pf.c
@@ -29,6 +29,28 @@ 
 
 #define I40E_CFG_CRCSTRIP_DEFAULT 1
 
+/* Supported RSS offloads */
+#define I40E_DEFAULT_RSS_HENA ( \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD))
+
+#define I40E_DEFAULT_RSS_HENA_EXPANDED (I40E_DEFAULT_RSS_HENA | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \
+	BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))
+
 static int
 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
 			   struct virtchnl_queue_select *qsel,
@@ -1288,6 +1310,36 @@ 
 				(u8 *)vfres, sizeof(*vfres));
 }
 
+static int
+i40e_pf_host_process_cmd_get_rss_hena(struct i40e_pf_vf *vf)
+{
+	struct virtchnl_rss_hena vrh = {0};
+	struct i40e_pf *pf = vf->pf;
+
+	if (pf->adapter->hw.mac.type == I40E_MAC_X722)
+		vrh.hena = I40E_DEFAULT_RSS_HENA_EXPANDED;
+	else
+		vrh.hena = I40E_DEFAULT_RSS_HENA;
+
+	return i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS,
+					   0, (u8 *)&vrh, sizeof(vrh));
+}
+
+static int
+i40e_pf_host_process_cmd_set_rss_hena(struct i40e_pf_vf *vf, u8 *msg)
+{
+	struct virtchnl_rss_hena *vrh =
+		(struct virtchnl_rss_hena *)msg;
+	struct i40e_hw *hw = &vf->pf->adapter->hw;
+
+	i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_idx), (u32)vrh->hena);
+	i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_idx),
+			  (u32)(vrh->hena >> 32));
+
+	return i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA,
+					   0, NULL, 0);
+}
+
 void
 i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
 			   uint16_t abs_vf_id, uint32_t opcode,
@@ -1458,6 +1510,12 @@ 
 		PMD_DRV_LOG(INFO, "OP_REQUEST_QUEUES received");
 		i40e_pf_host_process_cmd_request_queues(vf, msg);
 		break;
+	case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
+		ret = i40e_pf_host_process_cmd_get_rss_hena(vf);
+		break;
+	case VIRTCHNL_OP_SET_RSS_HENA:
+		ret = i40e_pf_host_process_cmd_set_rss_hena(vf, msg);
+		break;
 
 	/* Don't add command supported below, which will
 	 * return an error code.