From patchwork Mon May 10 15:03:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ferruh Yigit X-Patchwork-Id: 93106 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 85780A0A0E; Mon, 10 May 2021 17:04:04 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9C18C4110B; Mon, 10 May 2021 17:03:53 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id EFFBC4003E; Mon, 10 May 2021 17:03:48 +0200 (CEST) IronPort-SDR: LR5SXYuHBizjmwEPYihKnCuxHhn8DusqyLgXsAlqjOa88iTpu4Jfs3NQuwcTqeYM+DukcuVQrG l+y2aTKMjowQ== X-IronPort-AV: E=McAfee;i="6200,9189,9980"; a="186659465" X-IronPort-AV: E=Sophos;i="5.82,287,1613462400"; d="scan'208";a="186659465" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2021 08:03:30 -0700 IronPort-SDR: E/O8uH9ySc7icXERFtO6/1oNp0x35b9ex2XiyJq+GN9RHbiz64EuNXLeFcUcRgVnarN8Nv9Qha fPqBGdpLSiOA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,287,1613462400"; d="scan'208";a="541247416" Received: from silpixa00399752.ir.intel.com (HELO silpixa00399752.ger.corp.intel.com) ([10.237.222.27]) by orsmga004.jf.intel.com with ESMTP; 10 May 2021 08:03:27 -0700 From: Ferruh Yigit To: Qiming Yang , Qi Zhang , Paul M Stillwell Jr , Wenzhuo Lu , Leyi Rong , Shivanshu Shukla Cc: Ferruh Yigit , dev@dpdk.org, stable@dpdk.org, Kevin Traynor , Ajit Khaparde Date: Mon, 10 May 2021 16:03:18 +0100 Message-Id: <20210510150319.1496105-3-ferruh.yigit@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210510150319.1496105-1-ferruh.yigit@intel.com> References: <20210510150319.1496105-1-ferruh.yigit@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 3/4] net/ice/base: fix build with gcc11 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Reproduced with '--buildtype=debugoptimized' config, compiler version: gcc (GCC) 12.0.0 20210509 (experimental) There are multiple build errors, like: ../drivers/net/ice/base/ice_switch.c: In function ‘ice_add_marker_act’: ../drivers/net/ice/base/ice_switch.c:3727:15: warning: array subscript ‘struct ice_aqc_sw_rules_elem[0]’ is partly outside array bounds of ‘unsigned char[52]’ [-Warray-bounds] 3727 | lg_act->type = CPU_TO_LE16(ICE_AQC_SW_RULES_T_LG_ACT); | ^~ In file included from ../drivers/net/ice/base/ice_type.h:52, from ../drivers/net/ice/base/ice_common.h:8, from ../drivers/net/ice/base/ice_switch.h:8, from ../drivers/net/ice/base/ice_switch.c:5: ../drivers/net/ice/base/ice_osdep.h:209:29: note: referencing an object of size 52 allocated by ‘rte_zmalloc’ 209 | #define ice_malloc(h, s) rte_zmalloc(NULL, s, 0) | ^~~~~~~~~~~~~~~~~~~~~~~ ../drivers/net/ice/base/ice_switch.c:3720:50: note: in expansion of macro ‘ice_malloc’ lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, rules_size); These errors are mainly because allocated memory is cast to "struct ice_aqc_sw_rules_elem *" but allocated size is less than the size of "struct ice_aqc_sw_rules_elem". "struct ice_aqc_sw_rules_elem" has multiple other structs has unions, based on which one is used allocated memory being less than the size of "struct ice_aqc_sw_rules_elem" is logically correct but compiler is complaining about it. As a solution making sure allocated memory size is at least size of "struct ice_aqc_sw_rules_elem". The function to use the struct is 'ice_aq_sw_rules()', and it already has parameter for size of the rule, allocating more than needed shouldn't cause any problem. Fixes: c7dd15931183 ("net/ice/base: add virtual switch code") Fixes: 02acdce2f553 ("net/ice/base: add MAC filter with marker and counter") Fixes: f89aa3affa9e ("net/ice/base: support removing advanced rule") Cc: stable@dpdk.org Signed-off-by: Ferruh Yigit --- Cc: paul.m.stillwell.jr@intel.com Cc: qi.z.zhang@intel.com Cc: leyi.rong@intel.com Cc: Kevin Traynor Cc: Ajit Khaparde --- drivers/net/ice/base/ice_switch.c | 30 +++++++++++++++++++++++------- 1 file changed, 23 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 229b355c62c5..fa2a623aff8c 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -3704,6 +3704,7 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent, enum ice_status status; u16 lg_act_size; u16 rules_size; + u16 max_size; u32 act; u16 id; @@ -3717,7 +3718,9 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent, */ lg_act_size = (u16)ICE_SW_RULE_LG_ACT_SIZE(num_lg_acts); rules_size = lg_act_size + ICE_SW_RULE_RX_TX_ETH_HDR_SIZE; - lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, rules_size); + max_size = sizeof(struct ice_aqc_sw_rules_elem) * 2; + lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, + rules_size < max_size ? max_size : rules_size); if (!lg_act) return ICE_ERR_NO_MEMORY; @@ -3803,6 +3806,7 @@ ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent, u16 lg_act_size; u16 rules_size; u16 f_rule_id; + u16 max_size; u32 act; u16 id; @@ -3816,7 +3820,9 @@ ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent, */ lg_act_size = (u16)ICE_SW_RULE_LG_ACT_SIZE(num_acts); rules_size = lg_act_size + ICE_SW_RULE_RX_TX_ETH_HDR_SIZE; - lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, rules_size); + max_size = sizeof(struct ice_aqc_sw_rules_elem) * 2; + lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, + rules_size < max_size ? max_size : rules_size); if (!lg_act) return ICE_ERR_NO_MEMORY; @@ -4009,12 +4015,14 @@ static enum ice_status ice_create_pkt_fwd_rule(struct ice_hw *hw, struct ice_sw_recipe *recp_list, struct ice_fltr_list_entry *f_entry) { + u16 max_size = sizeof(struct ice_aqc_sw_rules_elem); struct ice_fltr_mgmt_list_entry *fm_entry; struct ice_aqc_sw_rules_elem *s_rule; enum ice_status status; s_rule = (struct ice_aqc_sw_rules_elem *) - ice_malloc(hw, ICE_SW_RULE_RX_TX_ETH_HDR_SIZE); + ice_malloc(hw, ICE_SW_RULE_RX_TX_ETH_HDR_SIZE < max_size ? + max_size : ICE_SW_RULE_RX_TX_ETH_HDR_SIZE); if (!s_rule) return ICE_ERR_NO_MEMORY; fm_entry = (struct ice_fltr_mgmt_list_entry *) @@ -4068,11 +4076,13 @@ ice_create_pkt_fwd_rule(struct ice_hw *hw, struct ice_sw_recipe *recp_list, static enum ice_status ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info) { + u16 max_size = sizeof(struct ice_aqc_sw_rules_elem); struct ice_aqc_sw_rules_elem *s_rule; enum ice_status status; s_rule = (struct ice_aqc_sw_rules_elem *) - ice_malloc(hw, ICE_SW_RULE_RX_TX_ETH_HDR_SIZE); + ice_malloc(hw, ICE_SW_RULE_RX_TX_ETH_HDR_SIZE < max_size ? + max_size : ICE_SW_RULE_RX_TX_ETH_HDR_SIZE); if (!s_rule) return ICE_ERR_NO_MEMORY; @@ -4545,11 +4555,13 @@ ice_remove_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list, } if (remove_rule) { + u16 max_size = sizeof(struct ice_aqc_sw_rules_elem); /* Remove the lookup rule */ struct ice_aqc_sw_rules_elem *s_rule; s_rule = (struct ice_aqc_sw_rules_elem *) - ice_malloc(hw, ICE_SW_RULE_RX_TX_NO_HDR_SIZE); + ice_malloc(hw, ICE_SW_RULE_RX_TX_NO_HDR_SIZE < max_size + ? max_size : ICE_SW_RULE_RX_TX_NO_HDR_SIZE); if (!s_rule) { status = ICE_ERR_NO_MEMORY; goto exit; @@ -5264,6 +5276,7 @@ enum ice_status ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set, u8 direction) { + u16 max_size = sizeof(struct ice_aqc_sw_rules_elem); struct ice_aqc_sw_rules_elem *s_rule; struct ice_fltr_info f_info; struct ice_hw *hw = pi->hw; @@ -5279,7 +5292,8 @@ ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set, s_rule_size = set ? ICE_SW_RULE_RX_TX_ETH_HDR_SIZE : ICE_SW_RULE_RX_TX_NO_HDR_SIZE; - s_rule = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, s_rule_size); + s_rule = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, s_rule_size < + max_size ? max_size : s_rule_size); if (!s_rule) return ICE_ERR_NO_MEMORY; @@ -8998,12 +9012,14 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, } ice_release_lock(rule_lock); if (remove_rule) { + u16 max_size = sizeof(struct ice_aqc_sw_rules_elem); struct ice_aqc_sw_rules_elem *s_rule; u16 rule_buf_sz; rule_buf_sz = ICE_SW_RULE_RX_TX_NO_HDR_SIZE; s_rule = (struct ice_aqc_sw_rules_elem *) - ice_malloc(hw, rule_buf_sz); + ice_malloc(hw, rule_buf_sz < max_size ? max_size : + rule_buf_sz); if (!s_rule) return ICE_ERR_NO_MEMORY; s_rule->pdata.lkup_tx_rx.act = 0;