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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT003.mail.protection.outlook.com (10.13.177.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4108.25 via Frontend Transport; Wed, 5 May 2021 08:06:51 +0000 Received: from nvidia.com (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 5 May 2021 08:06:48 +0000 From: Bing Zhao To: , , CC: , , Date: Wed, 5 May 2021 11:05:54 +0300 Message-ID: <20210505080600.33749-12-bingz@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210505080600.33749-1-bingz@nvidia.com> References: <20210427153811.11554-1-bingz@nvidia.com> <20210505080600.33749-1-bingz@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d8557c04-c521-45df-8e16-08d90f9cbd3a X-MS-TrafficTypeDiagnostic: BY5PR12MB4178: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2021 08:06:51.1823 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d8557c04-c521-45df-8e16-08d90f9cbd3a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT003.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4178 Subject: [dpdk-dev] [PATCH v5 11/17] net/mlx5: add translation of CT action X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When creating a flow with this action context for CT, it needs to be translated in 2 levels. First, retrieve from action context to rte_flow action. Second, translate it to the corresponding DR action with traffic direction that was specified when creating or updating via rte_flow_action_handle* API. Before using the DR action in a flow, the CT context should be available to use in the hardware. A synchronization is done before inserting the flow rule with CT action to check the HW availability of this CT context. In order to release the DR actions and reuse the context of a CT, the reference count should also be handled in the flow rule destroying. The CT index will be recorded in the rte_flow by reusing the ASO age index to save memory, since only one ASO action is supported in one flow rule currently. The action context type should also be saved for CT. When destroying a flow rule, if the context type is CT and the index is valid (non-zero), the release process should be handled. By default, the handling will fall back to try to release the ASO age if any. Signed-off-by: Bing Zhao --- drivers/net/mlx5/mlx5.h | 2 ++ drivers/net/mlx5/mlx5_flow.c | 9 +++++++ drivers/net/mlx5/mlx5_flow.h | 7 +++++- drivers/net/mlx5/mlx5_flow_aso.c | 41 ++++++++++++++++++++++++++++++++ drivers/net/mlx5/mlx5_flow_dv.c | 28 +++++++++++++++++++++- 5 files changed, 85 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index d2827e78d7..d01a10ea54 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -1710,5 +1710,7 @@ int mlx5_aso_ct_wait_ready(struct mlx5_dev_ctx_shared *sh, int mlx5_aso_ct_query_by_wqe(struct mlx5_dev_ctx_shared *sh, struct mlx5_aso_ct_action *ct, struct rte_flow_action_conntrack *profile); +int mlx5_aso_ct_available(struct mlx5_dev_ctx_shared *sh, + struct mlx5_aso_ct_action *ct); #endif /* RTE_PMD_MLX5_H_ */ diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index edad6007a8..f36eeae03f 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -3553,6 +3553,15 @@ flow_action_handles_translate(struct rte_eth_dev *dev, break; } /* Fall-through */ + case MLX5_INDIRECT_ACTION_TYPE_CT: + if (priv->sh->ct_aso_en) { + translated[handle->index].type = + RTE_FLOW_ACTION_TYPE_CONNTRACK; + translated[handle->index].conf = + (void *)(uintptr_t)idx; + break; + } + /* Fall-through */ default: mlx5_free(translated); return rte_flow_error_set diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 8f2bc7d2f6..286e3fb6a4 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -226,6 +226,7 @@ enum mlx5_feature_name { #define MLX5_FLOW_ACTION_TUNNEL_MATCH (1ull << 38) #define MLX5_FLOW_ACTION_MODIFY_FIELD (1ull << 39) #define MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY (1ull << 40) +#define MLX5_FLOW_ACTION_CT (1ull << 41) #define MLX5_FLOW_FATE_ACTIONS \ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | \ @@ -969,11 +970,15 @@ struct rte_flow { uint32_t drv_type:2; /**< Driver type. */ uint32_t tunnel:1; uint32_t meter:24; /**< Holds flow meter id. */ + uint32_t indirect_type:2; /**< Indirect action type. */ uint32_t rix_mreg_copy; /**< Index to metadata register copy table resource. */ uint32_t counter; /**< Holds flow counter. */ uint32_t tunnel_id; /**< Tunnel id */ - uint32_t age; /**< Holds ASO age bit index. */ + union { + uint32_t age; /**< Holds ASO age bit index. */ + uint32_t ct; /**< Holds ASO CT index. */ + }; uint32_t geneve_tlv_option; /**< Holds Geneve TLV option id. > */ } __rte_packed; diff --git a/drivers/net/mlx5/mlx5_flow_aso.c b/drivers/net/mlx5/mlx5_flow_aso.c index 3f7ed371bf..d0a989e213 100644 --- a/drivers/net/mlx5/mlx5_flow_aso.c +++ b/drivers/net/mlx5/mlx5_flow_aso.c @@ -1388,3 +1388,44 @@ mlx5_aso_ct_query_by_wqe(struct mlx5_dev_ctx_shared *sh, mlx5_aso_ct_obj_analyze(profile, out_data); return ret; } + +/* + * Make sure the conntrack context is synchronized with hardware before + * creating a flow rule that uses it. + * + * @param[in] sh + * Pointer to shared device context. + * @param[in] ct + * Pointer to connection tracking offload object. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +int +mlx5_aso_ct_available(struct mlx5_dev_ctx_shared *sh, + struct mlx5_aso_ct_action *ct) +{ + struct mlx5_aso_ct_pools_mng *mng = sh->ct_mng; + uint32_t poll_cqe_times = MLX5_CT_POLL_WQE_CQE_TIMES; + enum mlx5_aso_ct_state state = + __atomic_load_n(&ct->state, __ATOMIC_RELAXED); + + if (state == ASO_CONNTRACK_FREE) { + rte_errno = ENXIO; + return -rte_errno; + } else if (state == ASO_CONNTRACK_READY || + state == ASO_CONNTRACK_QUERY) { + return 0; + } + do { + mlx5_aso_ct_completion_handle(mng); + state = __atomic_load_n(&ct->state, __ATOMIC_RELAXED); + if (state == ASO_CONNTRACK_READY || + state == ASO_CONNTRACK_QUERY) + return 0; + /* Waiting for CQE ready, consider should block or sleep. */ + rte_delay_us_sleep(MLX5_ASO_WQE_CQE_RESPONSE_DELAY); + } while (--poll_cqe_times); + rte_errno = EBUSY; + return -rte_errno; +} diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 0fa0671ace..14af900267 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -11381,6 +11381,7 @@ flow_dv_translate_create_conntrack(struct rte_eth_dev *dev, return rte_flow_error_set(error, EBUSY, RTE_FLOW_ERROR_TYPE_ACTION, NULL, "Failed to update CT"); + ct->is_original = !!pro->is_original_dir; return idx; } @@ -11544,6 +11545,8 @@ flow_dv_translate(struct rte_eth_dev *dev, const struct rte_flow_action *found_action = NULL; uint32_t jump_group = 0; struct mlx5_flow_counter *cnt; + uint32_t ct_idx; + struct mlx5_aso_ct_action *ct; if (!mlx5_flow_os_action_supported(action_type)) return rte_flow_error_set(error, ENOTSUP, @@ -12017,6 +12020,26 @@ flow_dv_translate(struct rte_eth_dev *dev, return -rte_errno; action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD; break; + case RTE_FLOW_ACTION_TYPE_CONNTRACK: + ct_idx = (uint32_t)(uintptr_t)action->conf; + ct = flow_aso_ct_get_by_idx(dev, ct_idx); + if (mlx5_aso_ct_available(priv->sh, ct)) + return rte_flow_error_set(error, rte_errno, + RTE_FLOW_ERROR_TYPE_ACTION, + NULL, + "CT is unavailable."); + if (ct->is_original) + dev_flow->dv.actions[actions_n] = + ct->dr_action_orig; + else + dev_flow->dv.actions[actions_n] = + ct->dr_action_rply; + flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT; + flow->ct = ct_idx; + __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED); + actions_n++; + action_flags |= MLX5_FLOW_ACTION_CT; + break; case RTE_FLOW_ACTION_TYPE_END: actions_end = true; if (mhdr_res->actions_num) { @@ -13152,7 +13175,10 @@ flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) mlx5_flow_meter_detach(priv, fm); flow->meter = 0; } - if (flow->age) + /* Keep the current age handling by default. */ + if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct) + flow_dv_aso_ct_release(dev, flow->ct); + else if (flow->age) flow_dv_aso_age_release(dev, flow->age); if (flow->geneve_tlv_option) { flow_dv_geneve_tlv_option_resource_release(dev);