From patchwork Tue May 4 00:27:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 92694 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C0FD8A0562; Tue, 4 May 2021 02:29:47 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E724E41181; Tue, 4 May 2021 02:28:48 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 4C790410F3 for ; Tue, 4 May 2021 02:28:47 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 1440OuhZ025154; Mon, 3 May 2021 17:28:46 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=PXPg161LfuF16O6MjhImUdHZ0DCiKB4Pvi4fVexjLkE=; b=gpnjOQY3ruCQq4vvvPu8NxKw/XSqSdrK1rdT/Wcz/gNw9K4iwpCyTBeC6xXKRPiLGQbP xZ7iwjBDtQxB8OTOM5BSfjtiLphPuJmApHiZdvPFXQp9biBEANVqJ2crP0BACjQeAYyx KjP5K5TJwD4M+xL6AZLMUgmKOQ2rY7L+JhXl3mn66VnvehcbxfB/tEAQaLQBJUWU+spR nA/PJHT+gtXus6fTKZ1DV5WPPa1jA+w+Mp2moZurVQOMEgYqHdZGobJaGMKgrf0bvN6c JrfNCOAr9W4rTfya+pgbgh5DnKYqJC67iw3t1dSM35/IwyKpAPo4HIBXmwSOHU87wcOi BQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 38agtfjnq8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 03 May 2021 17:28:46 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 3 May 2021 17:28:45 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 3 May 2021 17:28:44 -0700 Received: from BG-LT7430.marvell.com (unknown [10.193.86.144]) by maili.marvell.com (Postfix) with ESMTP id 35F663F703F; Mon, 3 May 2021 17:28:42 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" , Anatoly Burakov CC: Date: Tue, 4 May 2021 05:57:06 +0530 Message-ID: <20210504002726.525-17-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210504002726.525-1-pbhagavatula@marvell.com> References: <20210503152238.2437-1-pbhagavatula@marvell.com> <20210504002726.525-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: XUhFFZCm4c035EQtmlcNDg2fKtFfSxZS X-Proofpoint-ORIG-GUID: XUhFFZCm4c035EQtmlcNDg2fKtFfSxZS X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-03_20:2021-05-03, 2021-05-03 signatures=0 Subject: [dpdk-dev] [PATCH v5 16/35] event/cnxk: add SSO GWS fastpath enqueue functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add SSO GWS fastpath event device enqueue functions. Signed-off-by: Pavan Nikhilesh --- drivers/event/cnxk/cn10k_eventdev.c | 16 +++- drivers/event/cnxk/cn10k_worker.c | 54 ++++++++++++++ drivers/event/cnxk/cn10k_worker.h | 12 +++ drivers/event/cnxk/cn9k_eventdev.c | 25 ++++++- drivers/event/cnxk/cn9k_worker.c | 112 ++++++++++++++++++++++++++++ drivers/event/cnxk/cn9k_worker.h | 24 ++++++ 6 files changed, 241 insertions(+), 2 deletions(-) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index 6522351ca..a1b44744b 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -2,7 +2,9 @@ * Copyright(C) 2021 Marvell. */ +#include "cn10k_worker.h" #include "cnxk_eventdev.h" +#include "cnxk_worker.h" static void cn10k_init_hws_ops(struct cn10k_sso_hws *ws, uintptr_t base) @@ -130,6 +132,16 @@ cn10k_sso_rsrc_init(void *arg, uint8_t hws, uint8_t hwgrp) return roc_sso_rsrc_init(&dev->sso, hws, hwgrp); } +static void +cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) +{ + PLT_SET_USED(event_dev); + event_dev->enqueue = cn10k_sso_hws_enq; + event_dev->enqueue_burst = cn10k_sso_hws_enq_burst; + event_dev->enqueue_new_burst = cn10k_sso_hws_enq_new_burst; + event_dev->enqueue_forward_burst = cn10k_sso_hws_enq_fwd_burst; +} + static void cn10k_sso_info_get(struct rte_eventdev *event_dev, struct rte_event_dev_info *dev_info) @@ -276,8 +288,10 @@ cn10k_sso_init(struct rte_eventdev *event_dev) event_dev->dev_ops = &cn10k_sso_dev_ops; /* For secondary processes, the primary has done all the work */ - if (rte_eal_process_type() != RTE_PROC_PRIMARY) + if (rte_eal_process_type() != RTE_PROC_PRIMARY) { + cn10k_sso_fp_fns_set(event_dev); return 0; + } rc = cnxk_sso_init(event_dev); if (rc < 0) diff --git a/drivers/event/cnxk/cn10k_worker.c b/drivers/event/cnxk/cn10k_worker.c index 63b587301..9b5cb7be6 100644 --- a/drivers/event/cnxk/cn10k_worker.c +++ b/drivers/event/cnxk/cn10k_worker.c @@ -5,3 +5,57 @@ #include "cn10k_worker.h" #include "cnxk_eventdev.h" #include "cnxk_worker.h" + +uint16_t __rte_hot +cn10k_sso_hws_enq(void *port, const struct rte_event *ev) +{ + struct cn10k_sso_hws *ws = port; + + switch (ev->op) { + case RTE_EVENT_OP_NEW: + return cn10k_sso_hws_new_event(ws, ev); + case RTE_EVENT_OP_FORWARD: + cn10k_sso_hws_forward_event(ws, ev); + break; + case RTE_EVENT_OP_RELEASE: + cnxk_sso_hws_swtag_flush(ws->tag_wqe_op, ws->swtag_flush_op); + break; + default: + return 0; + } + + return 1; +} + +uint16_t __rte_hot +cn10k_sso_hws_enq_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + RTE_SET_USED(nb_events); + return cn10k_sso_hws_enq(port, ev); +} + +uint16_t __rte_hot +cn10k_sso_hws_enq_new_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + struct cn10k_sso_hws *ws = port; + uint16_t i, rc = 1; + + for (i = 0; i < nb_events && rc; i++) + rc = cn10k_sso_hws_new_event(ws, &ev[i]); + + return nb_events; +} + +uint16_t __rte_hot +cn10k_sso_hws_enq_fwd_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + struct cn10k_sso_hws *ws = port; + + RTE_SET_USED(nb_events); + cn10k_sso_hws_forward_event(ws, ev); + + return 1; +} diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h index 04517055d..48158b320 100644 --- a/drivers/event/cnxk/cn10k_worker.h +++ b/drivers/event/cnxk/cn10k_worker.h @@ -148,4 +148,16 @@ cn10k_sso_hws_get_work_empty(struct cn10k_sso_hws *ws, struct rte_event *ev) return !!gw.u64[1]; } +/* CN10K Fastpath functions. */ +uint16_t __rte_hot cn10k_sso_hws_enq(void *port, const struct rte_event *ev); +uint16_t __rte_hot cn10k_sso_hws_enq_burst(void *port, + const struct rte_event ev[], + uint16_t nb_events); +uint16_t __rte_hot cn10k_sso_hws_enq_new_burst(void *port, + const struct rte_event ev[], + uint16_t nb_events); +uint16_t __rte_hot cn10k_sso_hws_enq_fwd_burst(void *port, + const struct rte_event ev[], + uint16_t nb_events); + #endif diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c index 00c5565e7..61a4d0823 100644 --- a/drivers/event/cnxk/cn9k_eventdev.c +++ b/drivers/event/cnxk/cn9k_eventdev.c @@ -2,7 +2,9 @@ * Copyright(C) 2021 Marvell. */ +#include "cn9k_worker.h" #include "cnxk_eventdev.h" +#include "cnxk_worker.h" #define CN9K_DUAL_WS_NB_WS 2 #define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id) @@ -150,6 +152,25 @@ cn9k_sso_rsrc_init(void *arg, uint8_t hws, uint8_t hwgrp) return roc_sso_rsrc_init(&dev->sso, hws, hwgrp); } +static void +cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev) +{ + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); + + event_dev->enqueue = cn9k_sso_hws_enq; + event_dev->enqueue_burst = cn9k_sso_hws_enq_burst; + event_dev->enqueue_new_burst = cn9k_sso_hws_enq_new_burst; + event_dev->enqueue_forward_burst = cn9k_sso_hws_enq_fwd_burst; + + if (dev->dual_ws) { + event_dev->enqueue = cn9k_sso_hws_dual_enq; + event_dev->enqueue_burst = cn9k_sso_hws_dual_enq_burst; + event_dev->enqueue_new_burst = cn9k_sso_hws_dual_enq_new_burst; + event_dev->enqueue_forward_burst = + cn9k_sso_hws_dual_enq_fwd_burst; + } +} + static void * cn9k_sso_init_hws_mem(void *arg, uint8_t port_id) { @@ -349,8 +370,10 @@ cn9k_sso_init(struct rte_eventdev *event_dev) event_dev->dev_ops = &cn9k_sso_dev_ops; /* For secondary processes, the primary has done all the work */ - if (rte_eal_process_type() != RTE_PROC_PRIMARY) + if (rte_eal_process_type() != RTE_PROC_PRIMARY) { + cn9k_sso_fp_fns_set(event_dev); return 0; + } rc = cnxk_sso_init(event_dev); if (rc < 0) diff --git a/drivers/event/cnxk/cn9k_worker.c b/drivers/event/cnxk/cn9k_worker.c index 836914163..538bc4b0b 100644 --- a/drivers/event/cnxk/cn9k_worker.c +++ b/drivers/event/cnxk/cn9k_worker.c @@ -5,3 +5,115 @@ #include "roc_api.h" #include "cn9k_worker.h" + +uint16_t __rte_hot +cn9k_sso_hws_enq(void *port, const struct rte_event *ev) +{ + struct cn9k_sso_hws *ws = port; + + switch (ev->op) { + case RTE_EVENT_OP_NEW: + return cn9k_sso_hws_new_event(ws, ev); + case RTE_EVENT_OP_FORWARD: + cn9k_sso_hws_forward_event(ws, ev); + break; + case RTE_EVENT_OP_RELEASE: + cnxk_sso_hws_swtag_flush(ws->tag_op, ws->swtag_flush_op); + break; + default: + return 0; + } + + return 1; +} + +uint16_t __rte_hot +cn9k_sso_hws_enq_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + RTE_SET_USED(nb_events); + return cn9k_sso_hws_enq(port, ev); +} + +uint16_t __rte_hot +cn9k_sso_hws_enq_new_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + struct cn9k_sso_hws *ws = port; + uint16_t i, rc = 1; + + for (i = 0; i < nb_events && rc; i++) + rc = cn9k_sso_hws_new_event(ws, &ev[i]); + + return nb_events; +} + +uint16_t __rte_hot +cn9k_sso_hws_enq_fwd_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + struct cn9k_sso_hws *ws = port; + + RTE_SET_USED(nb_events); + cn9k_sso_hws_forward_event(ws, ev); + + return 1; +} + +/* Dual ws ops. */ + +uint16_t __rte_hot +cn9k_sso_hws_dual_enq(void *port, const struct rte_event *ev) +{ + struct cn9k_sso_hws_dual *dws = port; + struct cn9k_sso_hws_state *vws; + + vws = &dws->ws_state[!dws->vws]; + switch (ev->op) { + case RTE_EVENT_OP_NEW: + return cn9k_sso_hws_dual_new_event(dws, ev); + case RTE_EVENT_OP_FORWARD: + cn9k_sso_hws_dual_forward_event(dws, vws, ev); + break; + case RTE_EVENT_OP_RELEASE: + cnxk_sso_hws_swtag_flush(vws->tag_op, vws->swtag_flush_op); + break; + default: + return 0; + } + + return 1; +} + +uint16_t __rte_hot +cn9k_sso_hws_dual_enq_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + RTE_SET_USED(nb_events); + return cn9k_sso_hws_dual_enq(port, ev); +} + +uint16_t __rte_hot +cn9k_sso_hws_dual_enq_new_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + struct cn9k_sso_hws_dual *dws = port; + uint16_t i, rc = 1; + + for (i = 0; i < nb_events && rc; i++) + rc = cn9k_sso_hws_dual_new_event(dws, &ev[i]); + + return nb_events; +} + +uint16_t __rte_hot +cn9k_sso_hws_dual_enq_fwd_burst(void *port, const struct rte_event ev[], + uint16_t nb_events) +{ + struct cn9k_sso_hws_dual *dws = port; + + RTE_SET_USED(nb_events); + cn9k_sso_hws_dual_forward_event(dws, &dws->ws_state[!dws->vws], ev); + + return 1; +} diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h index 85be742c1..aa321d0e4 100644 --- a/drivers/event/cnxk/cn9k_worker.h +++ b/drivers/event/cnxk/cn9k_worker.h @@ -246,4 +246,28 @@ cn9k_sso_hws_get_work_empty(struct cn9k_sso_hws_state *ws, struct rte_event *ev) return !!gw.u64[1]; } +/* CN9K Fastpath functions. */ +uint16_t __rte_hot cn9k_sso_hws_enq(void *port, const struct rte_event *ev); +uint16_t __rte_hot cn9k_sso_hws_enq_burst(void *port, + const struct rte_event ev[], + uint16_t nb_events); +uint16_t __rte_hot cn9k_sso_hws_enq_new_burst(void *port, + const struct rte_event ev[], + uint16_t nb_events); +uint16_t __rte_hot cn9k_sso_hws_enq_fwd_burst(void *port, + const struct rte_event ev[], + uint16_t nb_events); + +uint16_t __rte_hot cn9k_sso_hws_dual_enq(void *port, + const struct rte_event *ev); +uint16_t __rte_hot cn9k_sso_hws_dual_enq_burst(void *port, + const struct rte_event ev[], + uint16_t nb_events); +uint16_t __rte_hot cn9k_sso_hws_dual_enq_new_burst(void *port, + const struct rte_event ev[], + uint16_t nb_events); +uint16_t __rte_hot cn9k_sso_hws_dual_enq_fwd_burst(void *port, + const struct rte_event ev[], + uint16_t nb_events); + #endif