From patchwork Mon Apr 26 06:07:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Somnath Kotur X-Patchwork-Id: 92148 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 49ED4A0548; Mon, 26 Apr 2021 08:09:49 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 21ED641186; Mon, 26 Apr 2021 08:09:47 +0200 (CEST) Received: from relay.smtp-ext.broadcom.com (relay.smtp-ext.broadcom.com [192.19.11.229]) by mails.dpdk.org (Postfix) with ESMTP id 6713B41185; Mon, 26 Apr 2021 08:09:45 +0200 (CEST) Received: from dhcp-10-123-153-55.dhcp.broadcom.net (dhcp-10-123-153-55.dhcp.broadcom.net [10.123.153.55]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by relay.smtp-ext.broadcom.com (Postfix) with ESMTPS id 8786E53D35; Sun, 25 Apr 2021 23:09:42 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 8786E53D35 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1619417384; bh=rP7v1E/gNXH95veneuH/oTChdRRe4FuMwig6vVnmq00=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ehfthp9Q7nuxtwxDHR5QfbsnMfk/QEdoKEyyXCLqWglPc2pS03liUX7e1PgDE+fSe Q1ZXFZFNlm5MKP+g2hb6+Yb+A4+GiWTFtq7t8sSUOEm+u7MAGkczAsbOi2CzaSPBiz xaPNiMsrN/yvNmSriZeH3FlnWqYNMh6vb9pHT5Eo= From: Somnath Kotur To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Somnath Kotur , stable@dpdk.org, Ajit Khaparde Date: Mon, 26 Apr 2021 11:37:55 +0530 Message-Id: <20210426060755.12821-2-somnath.kotur@broadcom.com> X-Mailer: git-send-email 2.28.0.450.g3a238e5 In-Reply-To: <20210426060755.12821-1-somnath.kotur@broadcom.com> References: <20210426060755.12821-1-somnath.kotur@broadcom.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 2/2] net/bnxt: fix Rx FIFO pending bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Fix to clear the Rx FIFO while reading the timestamp. If the Rx FIFO has pending bit set, keep reading to clear it and return the last valid timestamp instead of unconditionally returning an error. Fixes: b11cceb83a34 ("net/bnxt: support timesync") Cc: stable@dpdk.org Signed-off-by: Somnath Kotur Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/bnxt.h | 1 + drivers/net/bnxt/bnxt_ethdev.c | 38 ++++++++++++++++++++++++++++++---- 2 files changed, 35 insertions(+), 4 deletions(-) diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index dfdfa9f7a0..8f3ae41911 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -306,6 +306,7 @@ struct rte_flow { struct bnxt_vnic_info *vnic; }; +#define BNXT_PTP_RX_PND_CNT 10 #define BNXT_PTP_FLAGS_PATH_TX 0x0 #define BNXT_PTP_FLAGS_PATH_RX 0x1 #define BNXT_PTP_FLAGS_CURRENT_TIME 0x2 diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index f5d2dc8590..eb81bf3991 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -3388,6 +3388,38 @@ static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t *ts) return 0; } +static int bnxt_clr_rx_ts(struct bnxt *bp, uint64_t *last_ts) +{ + struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; + struct bnxt_pf_info *pf = bp->pf; + uint16_t port_id; + int i = 0; + uint32_t fifo; + + if (!ptp || (bp->flags & BNXT_FLAG_CHIP_P5)) + return -EINVAL; + + port_id = pf->port_id; + fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 + + ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO])); + while ((fifo & BNXT_PTP_RX_FIFO_PENDING) && (i < BNXT_PTP_RX_PND_CNT)) { + rte_write32(1 << port_id, (uint8_t *)bp->bar0 + + ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]); + fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 + + ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO])); + *last_ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 + + ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L])); + *last_ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 + + ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32; + i++; + } + + if (i >= BNXT_PTP_RX_PND_CNT) + return -EBUSY; + + return 0; +} + static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts) { struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; @@ -3406,10 +3438,8 @@ static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts) fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 + ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO])); - if (fifo & BNXT_PTP_RX_FIFO_PENDING) { -/* bnxt_clr_rx_ts(bp); TBD */ - return -EBUSY; - } + if (fifo & BNXT_PTP_RX_FIFO_PENDING) + return bnxt_clr_rx_ts(bp, ts); *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 + ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));