From patchwork Thu Apr 8 07:41:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alvin Zhang X-Patchwork-Id: 90845 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D78E9A0579; Thu, 8 Apr 2021 09:41:14 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5A38F40698; Thu, 8 Apr 2021 09:41:14 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 5F74A40138; Thu, 8 Apr 2021 09:41:12 +0200 (CEST) IronPort-SDR: X2TGau/O66+g+bz5y/mxSaZQm/jAhY3Ol+lbs8CiNOHQwJmLi0yrCMYAjifu/v5r/V7iZwcx3k cFZc6+siA6nw== X-IronPort-AV: E=McAfee;i="6000,8403,9947"; a="193022892" X-IronPort-AV: E=Sophos;i="5.82,205,1613462400"; d="scan'208";a="193022892" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Apr 2021 00:41:10 -0700 IronPort-SDR: 3qrQIFZV0P90OggjaTRnIGohdG0WOTnWZ0FWNFv7+AU4a2j/XvUDq1nge3XQoPzMr5GG1NLpG4 YaOn9SyDv9Kg== X-IronPort-AV: E=Sophos;i="5.82,205,1613462400"; d="scan'208";a="449552437" Received: from shwdenpg235.ccr.corp.intel.com ([10.240.182.60]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Apr 2021 00:41:07 -0700 From: Alvin Zhang To: haiyue.wang@intel.com, jia.guo@intel.com Cc: dev@dpdk.org, Alvin Zhang , stable@dpdk.org Date: Thu, 8 Apr 2021 15:41:02 +0800 Message-Id: <20210408074102.15480-1-alvinx.zhang@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20210408072903.8008-1-alvinx.zhang@intel.com> References: <20210408072903.8008-1-alvinx.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2] net/e1000: fix max Rx packet size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" According to E1000_ETH_OVERHEAD definition, max_rx_pkt_len contains one VLAN tag size. Therefore when config RLPML register, if dual VLAN not enabled there is no need to add VLAN tag size to max_rx_pkt_len, otherwise only one another VLAN tag size should be added to. Fixes: e51abef39382 ("igb: fix max RX packet size and support dual VLAN") Cc: stable@dpdk.org Signed-off-by: Alvin Zhang Tested-by: Chen Lingli Acked-by: Haiyue Wang --- V2: Update commit log --- drivers/net/e1000/igb_ethdev.c | 5 ++--- drivers/net/e1000/igb_rxtx.c | 9 ++++++--- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index 2927cd7..7df7b0f 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -2688,8 +2688,7 @@ static int eth_igbvf_xstats_get_names(__rte_unused struct rte_eth_dev *dev, /* Update maximum packet length */ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) E1000_WRITE_REG(hw, E1000_RLPML, - dev->data->dev_conf.rxmode.max_rx_pkt_len + - VLAN_TAG_SIZE); + dev->data->dev_conf.rxmode.max_rx_pkt_len); } static void @@ -2708,7 +2707,7 @@ static int eth_igbvf_xstats_get_names(__rte_unused struct rte_eth_dev *dev, if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) E1000_WRITE_REG(hw, E1000_RLPML, dev->data->dev_conf.rxmode.max_rx_pkt_len + - 2 * VLAN_TAG_SIZE); + VLAN_TAG_SIZE); } static int diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c index 1500d2f..81f06f9 100644 --- a/drivers/net/e1000/igb_rxtx.c +++ b/drivers/net/e1000/igb_rxtx.c @@ -2343,15 +2343,18 @@ int eth_igb_rss_hash_conf_get(struct rte_eth_dev *dev, * Configure support of jumbo frames, if any. */ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { + uint32_t max_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; + rctl |= E1000_RCTL_LPE; /* * Set maximum packet length by default, and might be updated * together with enabling/disabling dual VLAN. */ - E1000_WRITE_REG(hw, E1000_RLPML, - dev->data->dev_conf.rxmode.max_rx_pkt_len + - VLAN_TAG_SIZE); + if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND) + max_len += VLAN_TAG_SIZE; + + E1000_WRITE_REG(hw, E1000_RLPML, max_len); } else rctl &= ~E1000_RCTL_LPE;