From patchwork Sat Apr 3 14:17:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ashwin Sekhar T K X-Patchwork-Id: 90523 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 40FC9A0548; Sat, 3 Apr 2021 16:18:33 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 53C53140E28; Sat, 3 Apr 2021 16:18:23 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id F2CBD4067B for ; Sat, 3 Apr 2021 16:18:21 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 133EILfc004873 for ; Sat, 3 Apr 2021 07:18:21 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=YDj3pmd2pY8RuBuOTPuwgHf+GNlnqYX2Zb6G6ftLwtw=; b=T4PGcf/8+Q/juJBAwmfJChVtbw6KXMPZmfj7+Ro5GhH/tB81i9T7KLR007Wo2YREdyK7 Mvml3OGsbf2/ntlRguky9ThwYbkisZirdxUB0oJbSp8GJrrzcFvJyHOxGZ3ncw8ZonSr SCdv74QtJCP5aSvBTNQkAuhsCdRuJRk4ymrZ8AV4s3fuhuQpfbZ8lTsoK9peYFGq6n9n qwZLfwq45kGqBTyOH1r3bO6wPM4gfy/AHNRjS0NOerwrZPkx65KBu8gNZlYoIMFWcdRt 9H+V+pGEI7eUG8wN26WoZMLMCsbOymgEu6QbSjYYCF5CczhQIFaQkI3JP7WRMWQgFfiN bA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 37pqvt86e3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 03 Apr 2021 07:18:21 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 3 Apr 2021 07:18:19 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 3 Apr 2021 07:18:19 -0700 Received: from lab-ci-142.marvell.com (unknown [10.28.36.142]) by maili.marvell.com (Postfix) with ESMTP id 500C13F704A; Sat, 3 Apr 2021 07:18:15 -0700 (PDT) From: Ashwin Sekhar T K To: CC: , , , , , , Date: Sat, 3 Apr 2021 19:47:44 +0530 Message-ID: <20210403141751.215926-4-asekhar@marvell.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210403141751.215926-1-asekhar@marvell.com> References: <20210305162149.2196166-1-asekhar@marvell.com> <20210403141751.215926-1-asekhar@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: y-WLSTv-sKPHzMPUBb24saXylQVqISgF X-Proofpoint-ORIG-GUID: y-WLSTv-sKPHzMPUBb24saXylQVqISgF X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-04-03_05:2021-04-01, 2021-04-03 signatures=0 Subject: [dpdk-dev] [PATCH v2 04/11] mempool/cnxk: register lf init/fini callbacks X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Register the CNXk mempool lf init/fini callbacks which will set the appropriate mempool ops to be used according to the platform. Signed-off-by: Ashwin Sekhar T K --- drivers/mempool/cnxk/cnxk_mempool_ops.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/mempool/cnxk/cnxk_mempool_ops.c b/drivers/mempool/cnxk/cnxk_mempool_ops.c index 2ce1816c04..18c307288c 100644 --- a/drivers/mempool/cnxk/cnxk_mempool_ops.c +++ b/drivers/mempool/cnxk/cnxk_mempool_ops.c @@ -2,6 +2,7 @@ * Copyright(C) 2021 Marvell. */ +#include #include #include "roc_api.h" @@ -169,3 +170,23 @@ cnxk_mempool_populate(struct rte_mempool *mp, unsigned int max_objs, mp, RTE_MEMPOOL_POPULATE_F_ALIGN_OBJ, max_objs, vaddr, iova, len, obj_cb, obj_cb_arg); } + +static int +cnxk_mempool_lf_init(void) +{ + if (roc_model_is_cn10k() || roc_model_is_cn9k()) + rte_mbuf_set_platform_mempool_ops("cnxk_mempool_ops"); + + return 0; +} + +static void +cnxk_mempool_lf_fini(void) +{ +} + +RTE_INIT(cnxk_mempool_ops_init) +{ + roc_npa_lf_init_cb_register(cnxk_mempool_lf_init); + roc_npa_lf_fini_cb_register(cnxk_mempool_lf_fini); +}