From patchwork Sat Mar 6 16:29:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 88662 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 73D06A0548; Sat, 6 Mar 2021 17:33:44 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 92EC422A4DE; Sat, 6 Mar 2021 17:31:19 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 4834722A362 for ; Sat, 6 Mar 2021 17:31:18 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 126GR2YM027797 for ; Sat, 6 Mar 2021 08:31:17 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=+SVydWoKahlr2hye/SPaQLBWyBYH36N1HJ3c7tdXJGY=; b=ONUP+UaTgDpaSBILM/WlWeYSi8Ooujos8lN7Z4E5+zGRDzRHSz7ikQYaLi+uK03Qi21a qkCHed5CoJTb7CpKXhnplbydCd13fGUpVP/1MIq7fuctbab7WSQB1htk79t83qAmBTiZ mJtd1x4RmfaKYtcAvHBPImtGAMRBiRHeOWNNV86GzY79TV5MWVmRFPcvjXKr41zUj5h+ aBuHqMjQ1MFcVOBy0c3ZXfOlgOcOBrVksq+BerisjZBcqjK1Wf5XvzDlax8R8GhLmTth trpHE235pzjMPCAze7/3lswSDnW8OALUvDzDu4nrSMYDbcBnaaPaRnpTagRVQD70mIiT /A== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3747yurexq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 06 Mar 2021 08:31:17 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 6 Mar 2021 08:31:15 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 6 Mar 2021 08:31:15 -0800 Received: from BG-LT7430.marvell.com (unknown [10.193.68.121]) by maili.marvell.com (Postfix) with ESMTP id 1808C3F7040; Sat, 6 Mar 2021 08:31:13 -0800 (PST) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: , Date: Sat, 6 Mar 2021 21:59:25 +0530 Message-ID: <20210306162942.6845-21-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210306162942.6845-1-pbhagavatula@marvell.com> References: <20210306162942.6845-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-06_08:2021-03-03, 2021-03-06 signatures=0 Subject: [dpdk-dev] [PATCH 20/36] event/cnxk: add timer adapter capabilities X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Shijith Thotton Add function to retrieve event timer adapter capabilities. Signed-off-by: Pavan Nikhilesh Signed-off-by: Shijith Thotton --- drivers/event/cnxk/cn10k_eventdev.c | 2 ++ drivers/event/cnxk/cn9k_eventdev.c | 2 ++ drivers/event/cnxk/cnxk_tim_evdev.c | 22 +++++++++++++++++++++- drivers/event/cnxk/cnxk_tim_evdev.h | 6 +++++- 4 files changed, 30 insertions(+), 2 deletions(-) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index 74070e005..30ca0d901 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -420,6 +420,8 @@ static struct rte_eventdev_ops cn10k_sso_dev_ops = { .port_unlink = cn10k_sso_port_unlink, .timeout_ticks = cnxk_sso_timeout_ticks, + .timer_adapter_caps_get = cnxk_tim_caps_get, + .dump = cnxk_sso_dump, .dev_start = cn10k_sso_start, .dev_stop = cn10k_sso_stop, diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c index 4fb0f1ccc..773152e55 100644 --- a/drivers/event/cnxk/cn9k_eventdev.c +++ b/drivers/event/cnxk/cn9k_eventdev.c @@ -494,6 +494,8 @@ static struct rte_eventdev_ops cn9k_sso_dev_ops = { .port_unlink = cn9k_sso_port_unlink, .timeout_ticks = cnxk_sso_timeout_ticks, + .timer_adapter_caps_get = cnxk_tim_caps_get, + .dump = cnxk_sso_dump, .dev_start = cn9k_sso_start, .dev_stop = cn9k_sso_stop, diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c index 76b17910f..6000b507a 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.c +++ b/drivers/event/cnxk/cnxk_tim_evdev.c @@ -5,6 +5,26 @@ #include "cnxk_eventdev.h" #include "cnxk_tim_evdev.h" +int +cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags, + uint32_t *caps, + const struct rte_event_timer_adapter_ops **ops) +{ + struct cnxk_tim_evdev *dev = cnxk_tim_priv_get(); + + RTE_SET_USED(flags); + RTE_SET_USED(ops); + + if (dev == NULL) + return -ENODEV; + + /* Store evdev pointer for later use. */ + dev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev; + *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT; + + return 0; +} + void cnxk_tim_init(struct roc_sso *sso) { @@ -37,7 +57,7 @@ cnxk_tim_init(struct roc_sso *sso) void cnxk_tim_fini(void) { - struct cnxk_tim_evdev *dev = tim_priv_get(); + struct cnxk_tim_evdev *dev = cnxk_tim_priv_get(); if (rte_eal_process_type() != RTE_PROC_PRIMARY) return; diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h index 6cf0adb21..8dcecb281 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.h +++ b/drivers/event/cnxk/cnxk_tim_evdev.h @@ -27,7 +27,7 @@ struct cnxk_tim_evdev { }; static inline struct cnxk_tim_evdev * -tim_priv_get(void) +cnxk_tim_priv_get(void) { const struct rte_memzone *mz; @@ -38,6 +38,10 @@ tim_priv_get(void) return mz->addr; } +int cnxk_tim_caps_get(const struct rte_eventdev *dev, uint64_t flags, + uint32_t *caps, + const struct rte_event_timer_adapter_ops **ops); + void cnxk_tim_init(struct roc_sso *sso); void cnxk_tim_fini(void);