From patchwork Fri Feb 19 14:26:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Dumitrescu X-Patchwork-Id: 88014 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 714F0A0546; Fri, 19 Feb 2021 15:26:24 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0E91D16092F; Fri, 19 Feb 2021 15:26:24 +0100 (CET) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id CF05316092E for ; Fri, 19 Feb 2021 15:26:21 +0100 (CET) IronPort-SDR: 7tFDnFQ/ZLmqnLWoZRv0SD3ugmo55ona3BVk++HL1Vx/myzKZehipT8AGyskByZSTgMRc87sID CKX/x3eJHy0A== X-IronPort-AV: E=McAfee;i="6000,8403,9899"; a="183064275" X-IronPort-AV: E=Sophos;i="5.81,189,1610438400"; d="scan'208";a="183064275" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Feb 2021 06:26:20 -0800 IronPort-SDR: J+laOWpcstfaWLTt+VKSHUd0XVZm7cGcPuU8YWa19wkXQk11QPaG25w/RAN6qF9sqRn25We26G L7evIoVMXU5w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,189,1610438400"; d="scan'208";a="419990634" Received: from silpixa00400573.ir.intel.com (HELO silpixa00400573.ger.corp.intel.com) ([10.237.223.107]) by fmsmga004.fm.intel.com with ESMTP; 19 Feb 2021 06:26:19 -0800 From: Cristian Dumitrescu To: dev@dpdk.org Date: Fri, 19 Feb 2021 14:26:19 +0000 Message-Id: <20210219142619.43960-1-cristian.dumitrescu@intel.com> X-Mailer: git-send-email 2.17.1 Subject: [dpdk-dev] [PATCH] examples/pipeline: make pipeline quanta configurable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Make the pipeline instruction quanta configurable at build time. Signed-off-by: Cristian Dumitrescu --- examples/pipeline/thread.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/examples/pipeline/thread.c b/examples/pipeline/thread.c index 6ac27e4eb..bf11e6144 100644 --- a/examples/pipeline/thread.c +++ b/examples/pipeline/thread.c @@ -30,6 +30,15 @@ #define THREAD_TIMER_PERIOD_MS 100 #endif +/* Pipeline instruction quanta: Needs to be big enough to do some meaningful + * work, but not too big to avoid starving any other pipelines mapped to the + * same thread. For a pipeline that executes 10 instructions per packet, a + * quanta of 1000 instructions equates to processing 100 packets. + */ +#ifndef PIPELINE_INSTR_QUANTA +#define PIPELINE_INSTR_QUANTA 1000 +#endif + /** * Control thread: data plane thread context */ @@ -517,7 +526,7 @@ thread_main(void *arg __rte_unused) /* Data Plane */ for (j = 0; j < t->n_pipelines; j++) - rte_swx_pipeline_run(t->p[j], 1000000); + rte_swx_pipeline_run(t->p[j], PIPELINE_INSTR_QUANTA); /* Control Plane */ if ((i & 0xF) == 0) {