From patchwork Fri Jan 22 19:19:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liron Himi X-Patchwork-Id: 87146 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C2211A0A0A; Fri, 22 Jan 2021 20:24:21 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4CD5514118F; Fri, 22 Jan 2021 20:21:01 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id F2FB714118A for ; Fri, 22 Jan 2021 20:20:57 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10MJB74K008693 for ; Fri, 22 Jan 2021 11:20:57 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=PhbgAcmhVz5xDdYumDH6DMI+x7PCyp+r4Q0VOEQouYM=; b=RT9mlwcMoxOtN5bTrQpBjAOFFXmhNRC5fGTdawTLWEPckol/PGl3mWghrSglIuwrEBHi U7HT/VWlqWRSs6CLI7EcEiNOYF8/VBk2J6lvfRyh4mvRWQZ4VHUmngQTBf37wo2Uh1Bk MJtEA9VFeDSNj3sE0jkiv8NYeRB/1ucwJxwxekp8MEZad4Rhu22shXk8aBSyxfenncHE o+g7Ku4MnI/4anP6ljSm59NZ1vqlpqA9zPjrGKn17eXBaZB80tSnbiIUJfy03qXgq/mP ehayOmC7uw8xAzS5pSbINNC57RE4YTvaJlSEOpqMGb/EiO8O4IWVu31teMbCnwr2eFS6 Uw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 3668p32vbb-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 22 Jan 2021 11:20:57 -0800 Received: from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 22 Jan 2021 11:20:54 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 22 Jan 2021 11:20:51 -0800 Received: from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 22 Jan 2021 11:20:50 -0800 From: To: CC: , Dana Vardi , Liron Himi Date: Fri, 22 Jan 2021 21:19:22 +0200 Message-ID: <20210122191925.24308-35-lironh@marvell.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210122191925.24308-1-lironh@marvell.com> References: <20201202101212.4717-1-lironh@marvell.com> <20210122191925.24308-1-lironh@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-22_14:2021-01-22, 2021-01-22 signatures=0 Subject: [dpdk-dev] [PATCH v2 34/37] net/mvpp2: support custom header before ethernet X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dana Vardi Extend 'start_hdr' options with custom header. Signed-off-by: Dana Vardi Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_qos.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index e420c0cbc..9fec3c156 100644 --- a/drivers/net/mvpp2/mrvl_qos.c +++ b/drivers/net/mvpp2/mrvl_qos.c @@ -23,6 +23,7 @@ #define MRVL_TOK_START_HDR "start_hdr" #define MRVL_TOK_START_HDR_NONE "none" #define MRVL_TOK_START_HDR_DSA "dsa" +#define MRVL_TOK_START_HDR_CUSTOM "custom" #define MRVL_TOK_START_HDR_EXT_DSA "ext_dsa" #define MRVL_TOK_DEFAULT_TC "default_tc" #define MRVL_TOK_DSCP "dscp" @@ -742,6 +743,10 @@ mrvl_get_cfg(const char *key __rte_unused, const char *path, void *extra_args) sizeof(MRVL_TOK_START_HDR_DSA))) (*cfg)->port[n].eth_start_hdr = PP2_PPIO_HDR_ETH_DSA; + else if (!strncmp(entry, MRVL_TOK_START_HDR_CUSTOM, + sizeof(MRVL_TOK_START_HDR_CUSTOM))) + (*cfg)->port[n].eth_start_hdr = + PP2_PPIO_HDR_ETH_CUSTOM; else if (!strncmp(entry, MRVL_TOK_START_HDR_EXT_DSA, sizeof(MRVL_TOK_START_HDR_EXT_DSA))) { (*cfg)->port[n].eth_start_hdr =