From patchwork Fri Jan 22 19:19:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liron Himi X-Patchwork-Id: 87126 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3B7DDA0A0A; Fri, 22 Jan 2021 20:21:52 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4012B1410F6; Fri, 22 Jan 2021 20:20:21 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 163F41410F1 for ; Fri, 22 Jan 2021 20:20:18 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10MJBVOH008788 for ; Fri, 22 Jan 2021 11:20:18 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=Yet+WRISGzWa0G3A1Aw7TohYt1MrC2UzGM7WXRzYY54=; b=GfdykDYiID9RSZXr19YYdXe2sGLNLSxXI4rCtu9wvtdvdVK67onVJynGO894tnAV7FeO eySPUcAqJ7iKX7Gy8y+gtq/je+kmeUnFtaZepat7wB+eRVOQb/nWLGamSUlsGfwVq9db Z1axLSKmXVipWYBPfy4+9/EYXUse2lu/jm3aqAxC2NH/Nl7ggJYGFBz0S1Mrm+4Dpk8Z ylZcfHhPBXzHrlKyRg3CZ2ro7yPqGBtRO880CVgPLFvaiOkBGQou0M2p4ndmrv6KAkFO L2SDFQu+os7k5hMzoAPXXxJC1T33Y52v0SmYLnP6EGhwjQ0M93nbRVCODOkrT+z8V2tH yA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 3668p32v9k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 22 Jan 2021 11:20:18 -0800 Received: from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 22 Jan 2021 11:20:16 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 22 Jan 2021 11:20:16 -0800 Received: from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 22 Jan 2021 11:20:15 -0800 From: To: CC: , Liron Himi Date: Fri, 22 Jan 2021 21:19:03 +0200 Message-ID: <20210122191925.24308-16-lironh@marvell.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210122191925.24308-1-lironh@marvell.com> References: <20201202101212.4717-1-lironh@marvell.com> <20210122191925.24308-1-lironh@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-22_14:2021-01-22, 2021-01-22 signatures=0 Subject: [dpdk-dev] [PATCH v2 15/37] net/mvpp2: add dsa mode support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Liron Himi Extend the config file with 'start-hdr' field. currently 'eth' (default) and 'dsa' headers are supported. Signed-off-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 4 ++ drivers/net/mvpp2/mrvl_qos.c | 65 ++++++++++++++++++++++++++------- drivers/net/mvpp2/mrvl_qos.h | 1 + 3 files changed, 57 insertions(+), 13 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index aabe5d210..71a6e8826 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -695,6 +695,10 @@ mrvl_dev_start(struct rte_eth_dev *dev) snprintf(match, sizeof(match), "ppio-%d:%d", priv->pp_id, priv->ppio_id); priv->ppio_params.match = match; + priv->ppio_params.eth_start_hdr = PP2_PPIO_HDR_ETH; + if (mrvl_qos_cfg) + priv->ppio_params.eth_start_hdr = + mrvl_qos_cfg->port[dev->data->port_id].eth_start_hdr; /* * Calculate the minimum bpool size for refill feature as follows: diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index 7fd970309..976cb06a8 100644 --- a/drivers/net/mvpp2/mrvl_qos.c +++ b/drivers/net/mvpp2/mrvl_qos.c @@ -19,6 +19,10 @@ /* Parsing tokens. Defined conveniently, so that any correction is easy. */ #define MRVL_TOK_DEFAULT "default" +#define MRVL_TOK_DSA_MODE "dsa_mode" +#define MRVL_TOK_DSA_MODE_NONE "none" +#define MRVL_TOK_DSA_MODE_DSA "dsa" +#define MRVL_TOK_DSA_MODE_EXT_DSA "ext_dsa" #define MRVL_TOK_DEFAULT_TC "default_tc" #define MRVL_TOK_DSCP "dscp" #define MRVL_TOK_MAPPING_PRIORITY "mapping_priority" @@ -494,16 +498,19 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char *path, const char *entry; char sec_name[32]; - if (file == NULL) - rte_exit(EXIT_FAILURE, "Cannot load configuration %s\n", path); + if (file == NULL) { + MRVL_LOG(ERR, "Cannot load configuration %s\n", path); + return -1; + } /* Create configuration. This is never accessed on the fast path, * so we can ignore socket. */ *cfg = rte_zmalloc("mrvl_qos_cfg", sizeof(struct mrvl_qos_cfg), 0); - if (*cfg == NULL) - rte_exit(EXIT_FAILURE, "Cannot allocate configuration %s\n", - path); + if (*cfg == NULL) { + MRVL_LOG(ERR, "Cannot allocate configuration %s\n", path); + return -1; + } n = rte_cfgfile_num_sections(file, MRVL_TOK_PORT, sizeof(MRVL_TOK_PORT) - 1); @@ -528,6 +535,31 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char *path, continue; } + entry = rte_cfgfile_get_entry(file, sec_name, + MRVL_TOK_DSA_MODE); + if (entry) { + if (!strncmp(entry, MRVL_TOK_DSA_MODE_NONE, + sizeof(MRVL_TOK_DSA_MODE_NONE))) + (*cfg)->port[n].eth_start_hdr = + PP2_PPIO_HDR_ETH; + else if (!strncmp(entry, MRVL_TOK_DSA_MODE_DSA, + sizeof(MRVL_TOK_DSA_MODE_DSA))) + (*cfg)->port[n].eth_start_hdr = + PP2_PPIO_HDR_ETH_DSA; + else if (!strncmp(entry, MRVL_TOK_DSA_MODE_EXT_DSA, + sizeof(MRVL_TOK_DSA_MODE_EXT_DSA))) { + (*cfg)->port[n].eth_start_hdr = + PP2_PPIO_HDR_ETH_EXT_DSA; + } else { + MRVL_LOG(ERR, + "Error in parsing %s value (%s)!\n", + MRVL_TOK_DSA_MODE, entry); + return -1; + } + } else { + (*cfg)->port[n].eth_start_hdr = PP2_PPIO_HDR_ETH; + } + /* * Read per-port rate limiting. Setting that will * disable per-queue rate limiting. @@ -575,13 +607,15 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char *path, (*cfg)->port[n].mapping_priority = PP2_CLS_QOS_TBL_IP_PRI; else if (!strncmp(entry, MRVL_TOK_VLAN, - sizeof(MRVL_TOK_VLAN))) + sizeof(MRVL_TOK_VLAN))) { (*cfg)->port[n].mapping_priority = PP2_CLS_QOS_TBL_VLAN_PRI; - else - rte_exit(EXIT_FAILURE, + } else { + MRVL_LOG(ERR, "Error in parsing %s value (%s)!\n", MRVL_TOK_MAPPING_PRIORITY, entry); + return -1; + } } else { (*cfg)->port[n].mapping_priority = PP2_CLS_QOS_TBL_VLAN_IP_PRI; @@ -604,18 +638,22 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char *path, for (i = 0; i < MRVL_PP2_RXQ_MAX; ++i) { ret = get_outq_cfg(file, n, i, *cfg); - if (ret < 0) - rte_exit(EXIT_FAILURE, + if (ret < 0) { + MRVL_LOG(ERR, "Error %d parsing port %d outq %d!\n", ret, n, i); + return -1; + } } for (i = 0; i < MRVL_PP2_TC_MAX; ++i) { ret = parse_tc_cfg(file, n, i, *cfg); - if (ret < 0) - rte_exit(EXIT_FAILURE, + if (ret < 0) { + MRVL_LOG(ERR, "Error %d parsing port %d tc %d!\n", ret, n, i); + return -1; + } } entry = rte_cfgfile_get_entry(file, sec_name, @@ -628,7 +666,8 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char *path, } else { if ((*cfg)->port[n].use_global_defaults == 0) { MRVL_LOG(ERR, - "Default Traffic Class required in custom configuration!"); + "Default Traffic Class required in " + "custom configuration!"); return -1; } } diff --git a/drivers/net/mvpp2/mrvl_qos.h b/drivers/net/mvpp2/mrvl_qos.h index f03e7731c..0934752cf 100644 --- a/drivers/net/mvpp2/mrvl_qos.h +++ b/drivers/net/mvpp2/mrvl_qos.h @@ -20,6 +20,7 @@ /* QoS config. */ struct mrvl_qos_cfg { struct port_cfg { + enum pp2_ppio_eth_start_hdr eth_start_hdr; int rate_limit_enable; struct pp2_ppio_rate_limit_params rate_limit_params; struct {