diff mbox series

[v1] net/ice/base: add ethertype offset for QinQ dummy pkt

Message ID 20210119071253.259063-1-yuying.zhang@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers show
Series [v1] net/ice/base: add ethertype offset for QinQ dummy pkt | expand

Checks

Context Check Description
ci/iol-testing warning Testing issues
ci/iol-abi-testing success Testing PASS
ci/iol-mellanox-Functional success Functional Testing PASS
ci/intel-Testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/checkpatch success coding style OK

Commit Message

Yuying Zhang Jan. 19, 2021, 7:12 a.m. UTC
Add the ethertype offset for QinQ switch rule dummy packet to
allow matching the corresponding field.

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

Comments

Qi Zhang Jan. 22, 2021, 2:47 a.m. UTC | #1
> -----Original Message-----
> From: Zhang, Yuying <yuying.zhang@intel.com>
> Sent: Tuesday, January 19, 2021 3:13 PM
> To: dev@dpdk.org; Yang, Qiming <qiming.yang@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>
> Cc: Wang, Haiyue <haiyue.wang@intel.com>; Guo, Junfeng
> <junfeng.guo@intel.com>; Zhang, Yuying <yuying.zhang@intel.com>
> Subject: [PATCH v1] net/ice/base: add ethertype offset for QinQ dummy pkt
> 
> Add the ethertype offset for QinQ switch rule dummy packet to allow matching
> the corresponding field.
> 
> Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
diff mbox series

Patch

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 692a147e6..641c582b6 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1611,6 +1611,7 @@  static const u8 dummy_ipv6_l2tpv3_pkt[] = {
 
 static const struct ice_dummy_pkt_offsets dummy_qinq_ipv4_packet_offsets[] = {
 	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,         12 },
 	{ ICE_VLAN_EX,		14 },
 	{ ICE_VLAN_OFOS,	18 },
 	{ ICE_IPV4_OFOS,	22 },
@@ -1621,7 +1622,8 @@  static const u8 dummy_qinq_ipv4_pkt[] = {
 	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
 	0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00,
-	0x91, 0x00,
+
+	0x91, 0x00,		/* ICE_ETYPE_OL 12 */
 
 	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
 	0x00, 0x00, 0x08, 0x00, /* ICE_VLAN_OFOS 18 */
@@ -1640,6 +1642,7 @@  static const u8 dummy_qinq_ipv4_pkt[] = {
 
 static const struct ice_dummy_pkt_offsets dummy_qinq_ipv6_packet_offsets[] = {
 	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,         12 },
 	{ ICE_VLAN_EX,		14 },
 	{ ICE_VLAN_OFOS,	18 },
 	{ ICE_IPV6_OFOS,	22 },
@@ -1650,7 +1653,8 @@  static const u8 dummy_qinq_ipv6_pkt[] = {
 	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
 	0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00,
-	0x91, 0x00,
+
+	0x91, 0x00,		/* ICE_ETYPE_OL 12 */
 
 	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
 	0x00, 0x00, 0x86, 0xDD, /* ICE_VLAN_OFOS 18 */
@@ -1677,6 +1681,7 @@  static const u8 dummy_qinq_ipv6_pkt[] = {
 
 static const struct ice_dummy_pkt_offsets dummy_qinq_pppoe_packet_offsets[] = {
 	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,         12 },
 	{ ICE_VLAN_EX,		14 },
 	{ ICE_VLAN_OFOS,	18 },
 	{ ICE_PPPOE,		22 },
@@ -1686,6 +1691,7 @@  static const struct ice_dummy_pkt_offsets dummy_qinq_pppoe_packet_offsets[] = {
 static const
 struct ice_dummy_pkt_offsets dummy_qinq_pppoe_ipv4_packet_offsets[] = {
 	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,         12 },
 	{ ICE_VLAN_EX,		14 },
 	{ ICE_VLAN_OFOS,	18 },
 	{ ICE_PPPOE,		22 },
@@ -1697,7 +1703,8 @@  static const u8 dummy_qinq_pppoe_ipv4_pkt[] = {
 	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
 	0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00,
-	0x91, 0x00,
+
+	0x91, 0x00,		/* ICE_ETYPE_OL 12 */
 
 	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
 	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 18 */