diff mbox series

[v2,03/11] net/octeontx_ep: add device init and uninit

Message ID 20210118093602.5449-3-pnalla@marvell.com (mailing list archive)
State Changes Requested, archived
Delegated to: Ferruh Yigit
Headers show
Series [v2,01/11] net/octeontx_ep: add build and doc infrastructure | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Nalla Pradeep Jan. 18, 2021, 9:35 a.m. UTC
Add basic init and uninit function which includes
initializing fields of ethdev private structure.

Signed-off-by: Nalla Pradeep <pnalla@marvell.com>
---
 drivers/net/octeontx_ep/otx_ep_common.h | 19 +++++-
 drivers/net/octeontx_ep/otx_ep_ethdev.c | 88 +++++++++++++++++++++++--
 2 files changed, 101 insertions(+), 6 deletions(-)

Comments

Jerin Jacob Jan. 19, 2021, 12:06 p.m. UTC | #1
On Mon, Jan 18, 2021 at 3:07 PM Nalla Pradeep <pnalla@marvell.com> wrote:
>
> Add basic init and uninit function which includes
> initializing fields of ethdev private structure.
>
> Signed-off-by: Nalla Pradeep <pnalla@marvell.com>
> ---
>  drivers/net/octeontx_ep/otx_ep_common.h | 19 +++++-
>  drivers/net/octeontx_ep/otx_ep_ethdev.c | 88 +++++++++++++++++++++++--
>  2 files changed, 101 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/octeontx_ep/otx_ep_common.h b/drivers/net/octeontx_ep/otx_ep_common.h
> index 3fa2de9ab3..1c31ea8de2 100644
> --- a/drivers/net/octeontx_ep/otx_ep_common.h
> +++ b/drivers/net/octeontx_ep/otx_ep_common.h
> @@ -4,11 +4,28 @@
>  #ifndef _OTX_EP_COMMON_H_
>  #define _OTX_EP_COMMON_H_
>
> +#define otx_ep_printf(level, fmt, args...)             \
> +       rte_log(RTE_LOG_ ## level, RTE_LOGTYPE_PMD,             \

Use dynamic log scheme.
Ferruh Yigit Jan. 26, 2021, 3:25 p.m. UTC | #2
On 1/18/2021 9:35 AM, Nalla Pradeep wrote:
> Add basic init and uninit function which includes
> initializing fields of ethdev private structure.
> 
> Signed-off-by: Nalla Pradeep <pnalla@marvell.com>

<...>

ep/otx_ep_common.h
> +++ b/drivers/net/octeontx_ep/otx_ep_common.h
> @@ -4,11 +4,28 @@
>   #ifndef _OTX_EP_COMMON_H_
>   #define _OTX_EP_COMMON_H_
>   
> +#define otx_ep_printf(level, fmt, args...)		\
> +	rte_log(RTE_LOG_ ## level, RTE_LOGTYPE_PMD,		\
> +		 fmt, ##args)

Can you please register a new type specific to PMD, instead of using the 
'RTE_LOGTYPE_PMD'?

<...>

> +static int
> +otx_ep_chip_specific_setup(struct otx_ep_device *otx_epvf)
> +{
> +	struct rte_pci_device *pdev = otx_epvf->pdev;
> +	uint32_t dev_id = pdev->id.device_id;
> +	int ret;
> +
> +	switch (dev_id) {
> +	case PCI_DEVID_OCTEONTX_EP_VF:
> +		otx_epvf->chip_id = dev_id;
> +		break;
> +	case PCI_DEVID_OCTEONTX2_EP_NET_VF:
> +	case PCI_DEVID_CN98XX_EP_NET_VF:
> +		otx_epvf->chip_id = dev_id;
> +		break;
> +	default:
> +		otx_ep_err("Unsupported device\n");
> +		ret = -EINVAL;
> +	}
> +
> +	if (!ret)
> +		otx_ep_info("OTX_EP dev_id[%d]\n", dev_id);

'ret' may be used uninitialized here. (I see it is fixed in later patches, but 
please fix here too)

<...>

> +
> +	return ret;
> +}
> +
> +/* OTX_EP VF device initialization */
> +static int
> +otx_epdev_init(struct otx_ep_device *otx_epvf)
> +{
> +	if (otx_ep_chip_specific_setup(otx_epvf)) {
> +		otx_ep_err("Chip specific setup failed\n");
> +		goto setup_fail;
> +	}
> +
> +	return 0;
> +
> +setup_fail:
> +	return -ENOMEM;

Is 'NOMEM' correct return type, there seems nothing related to the memory.

> +}
> +
>   static int
>   otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev)
>   {
> -	RTE_SET_USED(eth_dev);
> +	struct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);
> +
> +	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> +		return 0;
> +	otx_epvf->port_configured = 0;
> +
> +	if (eth_dev->data->mac_addrs != NULL)
> +		rte_free(eth_dev->data->mac_addrs);
>   

After 'otx_ep_eth_dev_uninit()' the 'rte_eth_dev_release_port()' is called:
rte_eth_dev_pci_generic_remove
   dev_uninit()
   rte_eth_dev_release_port()

'rte_eth_dev_pci_generic_remove()' also frees the 'eth_dev->data->mac_addrs' 
leading double free.

You can either free yourself and explicitly set the pointer to NULL, or relay 
the freeing of it to the 'rte_eth_dev_pci_generic_remove()'.

> -	return -ENODEV;
> +	return 0;
>   }
>   
>   static int
>   otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)
>   {
> -	RTE_SET_USED(eth_dev);
> +	struct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
> +	struct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);
> +	unsigned char vf_mac_addr[RTE_ETHER_ADDR_LEN];
>   
> -	return -ENODEV;
> +	/* Single process support */
> +	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> +		return 0;
> +
> +	rte_eth_copy_pci_info(eth_dev, pdev);
> +

'rte_eth_copy_pci_info()' already done before this point, as:
rte_eth_dev_pci_generic_probe
   rte_eth_dev_pci_allocate
     rte_eth_copy_pci_info

Can you please double check is the copying again required?

> +	if (pdev->mem_resource[0].addr) {
> +		otx_ep_info("OTX_EP BAR0 is mapped:\n");
> +	} else {
> +		otx_ep_err("OTX_EP: Failed to map device BARs\n");
> +		otx_ep_err("BAR0 %p\n", pdev->mem_resource[0].addr);
> +		return -ENODEV;
> +	}

Why do you need to check if BAR0 is mapped or not, when it can be unmapped?

> +	otx_epvf->eth_dev = eth_dev;
> +	otx_epvf->port_id = eth_dev->data->port_id;
> +	eth_dev->data->mac_addrs = rte_zmalloc("otx_ep", RTE_ETHER_ADDR_LEN, 0);
> +	if (eth_dev->data->mac_addrs == NULL) {
> +		otx_ep_err("MAC addresses memory allocation failed\n");
> +		return -ENOMEM;
> +	}
> +	rte_eth_random_addr(vf_mac_addr);
> +	memcpy(eth_dev->data->mac_addrs, vf_mac_addr, RTE_ETHER_ADDR_LEN);

You can use 'rte_ether_addr_copy()' to copy mac.

> +	otx_epvf->hw_addr = pdev->mem_resource[0].addr;
> +	otx_epvf->pdev = pdev;
> +
> +	otx_epdev_init(otx_epvf);
> +	otx_epvf->port_configured = 0;

Is 'port_configured' used? It seems not checked at all.

> +
> +	return 0;
>   }
>   
>   static int
> @@ -42,7 +121,6 @@ otx_ep_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
>   					      otx_ep_eth_dev_uninit);
>   }
>   
> -

Please fix these kind of things in the original patch that introduces it.

>   /* Set of PCI devices this driver supports */
>   static const struct rte_pci_id pci_id_otx_ep_map[] = {
>   	{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX_EP_VF) },
>
diff mbox series

Patch

diff --git a/drivers/net/octeontx_ep/otx_ep_common.h b/drivers/net/octeontx_ep/otx_ep_common.h
index 3fa2de9ab3..1c31ea8de2 100644
--- a/drivers/net/octeontx_ep/otx_ep_common.h
+++ b/drivers/net/octeontx_ep/otx_ep_common.h
@@ -4,11 +4,28 @@ 
 #ifndef _OTX_EP_COMMON_H_
 #define _OTX_EP_COMMON_H_
 
+#define otx_ep_printf(level, fmt, args...)		\
+	rte_log(RTE_LOG_ ## level, RTE_LOGTYPE_PMD,		\
+		 fmt, ##args)
+
+#define otx_ep_info(fmt, args...)				\
+	otx_ep_printf(INFO, fmt, ##args)
+
+#define otx_ep_err(fmt, args...)				\
+	otx_ep_printf(ERR, fmt, ##args)
+
+#define otx_ep_dbg(fmt, args...)				\
+	otx_ep_printf(DEBUG, fmt, ##args)
+
 /* OTX_EP EP VF device data structure */
 struct otx_ep_device {
 	/* PCI device pointer */
 	struct rte_pci_device *pdev;
-
+	uint16_t chip_id;
 	struct rte_eth_dev *eth_dev;
+	int port_id;
+	/* Memory mapped h/w address */
+	uint8_t *hw_addr;
+	int port_configured;
 };
 #endif  /* _OTX_EP_COMMON_H_ */
diff --git a/drivers/net/octeontx_ep/otx_ep_ethdev.c b/drivers/net/octeontx_ep/otx_ep_ethdev.c
index 4eb75a2765..a1afdfab67 100644
--- a/drivers/net/octeontx_ep/otx_ep_ethdev.c
+++ b/drivers/net/octeontx_ep/otx_ep_ethdev.c
@@ -10,20 +10,99 @@ 
 #include "otx_ep_common.h"
 #include "otx_ep_vf.h"
 
+#define OTX_EP_DEV(_eth_dev)            ((_eth_dev)->data->dev_private)
+static int
+otx_ep_chip_specific_setup(struct otx_ep_device *otx_epvf)
+{
+	struct rte_pci_device *pdev = otx_epvf->pdev;
+	uint32_t dev_id = pdev->id.device_id;
+	int ret;
+
+	switch (dev_id) {
+	case PCI_DEVID_OCTEONTX_EP_VF:
+		otx_epvf->chip_id = dev_id;
+		break;
+	case PCI_DEVID_OCTEONTX2_EP_NET_VF:
+	case PCI_DEVID_CN98XX_EP_NET_VF:
+		otx_epvf->chip_id = dev_id;
+		break;
+	default:
+		otx_ep_err("Unsupported device\n");
+		ret = -EINVAL;
+	}
+
+	if (!ret)
+		otx_ep_info("OTX_EP dev_id[%d]\n", dev_id);
+
+	return ret;
+}
+
+/* OTX_EP VF device initialization */
+static int
+otx_epdev_init(struct otx_ep_device *otx_epvf)
+{
+	if (otx_ep_chip_specific_setup(otx_epvf)) {
+		otx_ep_err("Chip specific setup failed\n");
+		goto setup_fail;
+	}
+
+	return 0;
+
+setup_fail:
+	return -ENOMEM;
+}
+
 static int
 otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev)
 {
-	RTE_SET_USED(eth_dev);
+	struct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);
+
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return 0;
+	otx_epvf->port_configured = 0;
+
+	if (eth_dev->data->mac_addrs != NULL)
+		rte_free(eth_dev->data->mac_addrs);
 
-	return -ENODEV;
+	return 0;
 }
 
 static int
 otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)
 {
-	RTE_SET_USED(eth_dev);
+	struct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
+	struct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);
+	unsigned char vf_mac_addr[RTE_ETHER_ADDR_LEN];
 
-	return -ENODEV;
+	/* Single process support */
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return 0;
+
+	rte_eth_copy_pci_info(eth_dev, pdev);
+
+	if (pdev->mem_resource[0].addr) {
+		otx_ep_info("OTX_EP BAR0 is mapped:\n");
+	} else {
+		otx_ep_err("OTX_EP: Failed to map device BARs\n");
+		otx_ep_err("BAR0 %p\n", pdev->mem_resource[0].addr);
+		return -ENODEV;
+	}
+	otx_epvf->eth_dev = eth_dev;
+	otx_epvf->port_id = eth_dev->data->port_id;
+	eth_dev->data->mac_addrs = rte_zmalloc("otx_ep", RTE_ETHER_ADDR_LEN, 0);
+	if (eth_dev->data->mac_addrs == NULL) {
+		otx_ep_err("MAC addresses memory allocation failed\n");
+		return -ENOMEM;
+	}
+	rte_eth_random_addr(vf_mac_addr);
+	memcpy(eth_dev->data->mac_addrs, vf_mac_addr, RTE_ETHER_ADDR_LEN);
+	otx_epvf->hw_addr = pdev->mem_resource[0].addr;
+	otx_epvf->pdev = pdev;
+
+	otx_epdev_init(otx_epvf);
+	otx_epvf->port_configured = 0;
+
+	return 0;
 }
 
 static int
@@ -42,7 +121,6 @@  otx_ep_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
 					      otx_ep_eth_dev_uninit);
 }
 
-
 /* Set of PCI devices this driver supports */
 static const struct rte_pci_id pci_id_otx_ep_map[] = {
 	{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX_EP_VF) },