From patchwork Sun Jan 3 03:46:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 85937 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9031BA09E4; Sun, 3 Jan 2021 04:47:20 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1FD2C1606AB; Sun, 3 Jan 2021 04:46:52 +0100 (CET) Received: from mail-pg1-f181.google.com (mail-pg1-f181.google.com [209.85.215.181]) by mails.dpdk.org (Postfix) with ESMTP id 51DFE1606AB for ; Sun, 3 Jan 2021 04:46:50 +0100 (CET) Received: by mail-pg1-f181.google.com with SMTP id 30so11883784pgr.6 for ; Sat, 02 Jan 2021 19:46:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=pNHOuWHuio7HV11UTa75n4IwDvFhMjEnc5dVWT48iec=; b=aTisKdeQW8/GpUSO5TQLR/nfYCo8QFZu4pFPZ50tFlslXLut+3LlnsN3iT1CxwqI4/ ybTm7rbkPaQ53VwKDsywkyNvnP49OyKkgJzDF4Rs4gU6GXd66Wqn3nCmmw12Lwz/Yt6D J6DBhxwv8Rcu9opQ9cNATY3hM86b2KrV8Bfvs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=pNHOuWHuio7HV11UTa75n4IwDvFhMjEnc5dVWT48iec=; b=YwZU39v6ME4R6mKOzIboFNvwFdty+Z2xhPKkvq0XN7g2Cq/XInWjAOBbBk7ELPQgIP QG3O+HYBKfZDtjLVrH0+Zg21nQMPBg/wLg2Vo+JKn2VIV6+VuD3VjyOV2f2n8EyOVjC7 5ebMcyD10yPk5+fm8lU4ptLNE+KkeLaIXhBa4RV50sNEUItqKUTuAMRcGd0o3eBtXglC OaswghvHaj3sTxkTsrtjvgh527TSE/vk3cF8Dz5L1MdBfqnkN8y6Bfn+4nSm8CzQruIy /a/bqHuyb0+/w1x6NNK38VxV2yRbgvUdvvwJZSHgXnTgojhKETqNKtXgYhwcxs86TbuK NVMA== X-Gm-Message-State: AOAM532yYhsCCKbeGmffS4Qv78+JrB8kTI/05ktVuB3ab5bFNFfkmTaA ZVWTtQDoGUmbApqOJYIKemB5Wgr1eNQDsVlZaJBeC+I/56vSg/FPF67jChBcnwyLBdpeTSeb0VS geIvueSnThJRtozKIERkhP6svs4HlBNXgyqTjFLnxnmsyHiec4jiNeu72rHNSLC97YQ== X-Google-Smtp-Source: ABdhPJzCRJMgDN/DMDx2xzKgBRyZhMnKFEXrIXEdEjdDmee8TL5WMFcFqSN8GFILr1EaVUXPvMESqw== X-Received: by 2002:a65:55ca:: with SMTP id k10mr65757896pgs.431.1609645609149; Sat, 02 Jan 2021 19:46:49 -0800 (PST) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id k7sm51391194pfh.201.2021.01.02.19.46.47 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 02 Jan 2021 19:46:48 -0800 (PST) From: Ajit Khaparde To: dev@dpdk.org Cc: Kalesh AP Date: Sat, 2 Jan 2021 19:46:26 -0800 Message-Id: <20210103034627.80169-6-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210103034627.80169-1-ajit.khaparde@broadcom.com> References: <20201220052430.99990-1-ajit.khaparde@broadcom.com> <20210103034627.80169-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 5/6] net/bnxt: modify context memory allocation code X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kalesh AP Newer devices like SR2 may have chip backing store and do not require host backed memory allocation. In these cases, HWRM_FUNC_BACKING_STORE_QCAPS will return a zero entry size to indicate contexts for which the host should not allocate backing store. Selectively allocate context memory based on device capabilities and only enable backing store for the appropriate contexts. Signed-off-by: Kalesh AP Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/bnxt_ethdev.c | 60 ++++++++++++++++++++-------------- drivers/net/bnxt/bnxt_hwrm.c | 3 ++ 2 files changed, 39 insertions(+), 24 deletions(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 8ca4fb151..e11751cc1 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -4212,39 +4212,49 @@ int bnxt_alloc_ctx_mem(struct bnxt *bp) ctx_pg = &ctx->qp_mem; ctx_pg->entries = ctx->qp_min_qp1_entries + ctx->qp_max_l2_entries; - mem_size = ctx->qp_entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "qp_mem", 0); - if (rc) - return rc; + if (ctx->qp_entry_size) { + mem_size = ctx->qp_entry_size * ctx_pg->entries; + rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "qp_mem", 0); + if (rc) + return rc; + } ctx_pg = &ctx->srq_mem; ctx_pg->entries = ctx->srq_max_l2_entries; - mem_size = ctx->srq_entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "srq_mem", 0); - if (rc) - return rc; + if (ctx->srq_entry_size) { + mem_size = ctx->srq_entry_size * ctx_pg->entries; + rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "srq_mem", 0); + if (rc) + return rc; + } ctx_pg = &ctx->cq_mem; ctx_pg->entries = ctx->cq_max_l2_entries; - mem_size = ctx->cq_entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "cq_mem", 0); - if (rc) - return rc; + if (ctx->cq_entry_size) { + mem_size = ctx->cq_entry_size * ctx_pg->entries; + rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "cq_mem", 0); + if (rc) + return rc; + } ctx_pg = &ctx->vnic_mem; ctx_pg->entries = ctx->vnic_max_vnic_entries + ctx->vnic_max_ring_table_entries; - mem_size = ctx->vnic_entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "vnic_mem", 0); - if (rc) - return rc; + if (ctx->vnic_entry_size) { + mem_size = ctx->vnic_entry_size * ctx_pg->entries; + rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "vnic_mem", 0); + if (rc) + return rc; + } ctx_pg = &ctx->stat_mem; ctx_pg->entries = ctx->stat_max_entries; - mem_size = ctx->stat_entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "stat_mem", 0); - if (rc) - return rc; + if (ctx->stat_entry_size) { + mem_size = ctx->stat_entry_size * ctx_pg->entries; + rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "stat_mem", 0); + if (rc) + return rc; + } min = ctx->tqm_min_entries_per_ring; @@ -4260,10 +4270,12 @@ int bnxt_alloc_ctx_mem(struct bnxt *bp) for (i = 0, ena = 0; i < ctx->tqm_fp_rings_count + 1; i++) { ctx_pg = ctx->tqm_mem[i]; ctx_pg->entries = i ? entries : entries_sp; - mem_size = ctx->tqm_entry_size * ctx_pg->entries; - rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "tqm_mem", i); - if (rc) - return rc; + if (ctx->tqm_entry_size) { + mem_size = ctx->tqm_entry_size * ctx_pg->entries; + rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "tqm_mem", i); + if (rc) + return rc; + } ena |= HWRM_FUNC_BACKING_STORE_CFG_INPUT_ENABLES_TQM_SP << i; } diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 56e2e33a9..6d54b1656 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -64,6 +64,9 @@ static void bnxt_hwrm_set_pg_attr(struct bnxt_ring_mem_info *rmem, uint8_t *pg_attr, uint64_t *pg_dir) { + if (rmem->nr_pages == 0) + return; + if (rmem->nr_pages > 1) { *pg_attr = 1; *pg_dir = rte_cpu_to_le_64(rmem->pg_tbl_map);