From patchwork Fri Dec 4 20:16:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Boyer X-Patchwork-Id: 84766 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0A276A09E3; Fri, 4 Dec 2020 21:20:22 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9F3D0C9FC; Fri, 4 Dec 2020 21:17:57 +0100 (CET) Received: from mail-pf1-f195.google.com (mail-pf1-f195.google.com [209.85.210.195]) by dpdk.org (Postfix) with ESMTP id 9830ECA24 for ; Fri, 4 Dec 2020 21:17:54 +0100 (CET) Received: by mail-pf1-f195.google.com with SMTP id q10so4543255pfn.0 for ; Fri, 04 Dec 2020 12:17:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pensando.io; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=WzvHzqAWIscoUrkRtvvm2D/Q+AlQGWNltOLKU+0mO6k=; b=CBmtpw/DdVDuRpvrkV+W9Bhzjz8asnzF0er+vZ1ApG5N8rxqgXUxERFIL2u3A/72HW GaVA+HSEF74ANFKOGWlxVFGGrELvLxpmX1ajspXreRHLkalcbqSZLsX/e/8y77dxn52a reD35xQlPAdeW0rWG5Wl0kHZgyr8665hrF6sodNMJ17lqcOXn8ERMFgHzNXgEs9FbqLR +PEbEPg2yR7W19IivgAkE200T705FbWtdGoidjiw9UfiWyY0cbrX0kEnat+/u+yc1a2F dDVtTJUUifRz9MKcgmtilAFpGer8cIKQbpyCCpuvDR8JnkhytSJc29zf4Q27ovgoic0J AMng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=WzvHzqAWIscoUrkRtvvm2D/Q+AlQGWNltOLKU+0mO6k=; b=ianDEJqe3VUIQg1FkOVpLGYlS7fRZvb26g/IbPnYJP/ujGXx5reeuS5arNE0vMf4ph F6vWSx1cLQy8vpC9bqJn58UFVxTNXcsh02Nnvz8ptmd5CAHvxl6KDky+GN9H6hBDaRHP kp4RDsF7cLTaLAt62sYZgOOwfvKlS8Dk0r882yUpB7gMgQz17ZPpc58tUV3SO5kK3SN7 XPz1Luidnw3kkByoZZMdf+YaXqw7/UCER5ZQyjv0tTbCYuW668sa2PoLHwBVvgWWO7oQ mbAT/3yMRBYCve9rXdTm9N1YHGjXJ6ms9528CxcmM9Tx8ZzAfjwh7lhCKXpuj2ddF82E SUIw== X-Gm-Message-State: AOAM532hsJKyFQtcBwb3pvoLbTe2t76liBPCCvdyyhjjz00maRQ42cqf nEr8r/oEzBE7MyU0JAKtenEzht3SVUvxFQ== X-Google-Smtp-Source: ABdhPJyU9JWXivXLhmHtPE7UgFGCeJeyGvtLhUe5S6H/Riw6nU/pSaBJCt6+SfclAv4j/zqovI9eCg== X-Received: by 2002:a05:6a00:7c7:b029:19d:bab0:bc90 with SMTP id n7-20020a056a0007c7b029019dbab0bc90mr5451909pfu.62.1607113072303; Fri, 04 Dec 2020 12:17:52 -0800 (PST) Received: from driver-dev1.pensando.io ([12.226.153.42]) by smtp.gmail.com with ESMTPSA id z20sm2911805pjq.16.2020.12.04.12.17.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Dec 2020 12:17:51 -0800 (PST) From: Andrew Boyer To: dev@dpdk.org Cc: Alfredo Cardigliano , Andrew Boyer Date: Fri, 4 Dec 2020 12:16:46 -0800 Message-Id: <20201204201646.51746-10-aboyer@pensando.io> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201204201646.51746-1-aboyer@pensando.io> References: <20201204201646.51746-1-aboyer@pensando.io> In-Reply-To: <20201203203418.15064-1-aboyer@pensando.io> References: <20201203203418.15064-1-aboyer@pensando.io> Subject: [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Expose ionic_opcode_to_str() so it can be used for dev cmds, too. Store the device name in struct adapter. Switch to memcpy() to work around gcc false positives. Signed-off-by: Andrew Boyer --- drivers/net/ionic/ionic.h | 1 + drivers/net/ionic/ionic_dev.c | 5 +++ drivers/net/ionic/ionic_dev.h | 2 + drivers/net/ionic/ionic_ethdev.c | 4 +- drivers/net/ionic/ionic_lif.c | 68 ++++++++++++++++--------------- drivers/net/ionic/ionic_mac_api.c | 4 +- drivers/net/ionic/ionic_main.c | 32 ++++++++------- drivers/net/ionic/ionic_rxtx.c | 41 ++++++++----------- 8 files changed, 84 insertions(+), 73 deletions(-) diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h index a93110326..7ad0ab69e 100644 --- a/drivers/net/ionic/ionic.h +++ b/drivers/net/ionic/ionic.h @@ -48,6 +48,7 @@ struct ionic_hw { struct ionic_adapter { struct ionic_hw hw; struct ionic_dev idev; + const char *name; struct ionic_dev_bar bars[IONIC_BARS_MAX]; struct ionic_identity ident; struct ionic_lif *lifs[IONIC_LIFS_MAX]; diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c index fc68f5c74..f32966521 100644 --- a/drivers/net/ionic/ionic_dev.c +++ b/drivers/net/ionic/ionic_dev.c @@ -102,6 +102,9 @@ ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd) uint32_t cmd_size = sizeof(cmd->words) / sizeof(cmd->words[0]); + IONIC_PRINT(DEBUG, "Sending %s (%d) via dev_cmd", + ionic_opcode_to_str(cmd->cmd.opcode), cmd->cmd.opcode); + for (i = 0; i < cmd_size; i++) iowrite32(cmd->words[i], &idev->dev_cmd->cmd.words[i]); @@ -348,6 +351,8 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev, .q_init.cq_ring_base = cq->base_pa, }; + IONIC_PRINT(DEBUG, "adminq.q_init.ver %u", cmd.q_init.ver); + ionic_dev_cmd_go(idev, &cmd); } diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h index 7150f7f2c..026c4a9f3 100644 --- a/drivers/net/ionic/ionic_dev.h +++ b/drivers/net/ionic/ionic_dev.h @@ -205,6 +205,8 @@ struct ionic_qcq; void ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr, unsigned long index); +const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode); + int ionic_dev_setup(struct ionic_adapter *adapter); void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd); diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c index a1c35ace3..d700aa745 100644 --- a/drivers/net/ionic/ionic_ethdev.c +++ b/drivers/net/ionic/ionic_ethdev.c @@ -571,7 +571,7 @@ ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev, if (reta_size != ident->lif.eth.rss_ind_tbl_sz) { IONIC_PRINT(ERR, "The size of hash lookup table configured " - "(%d) doesn't match the number hardware can supported " + "(%d) does not match the number hardware can support " "(%d)", reta_size, ident->lif.eth.rss_ind_tbl_sz); return -EINVAL; @@ -605,7 +605,7 @@ ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev, if (reta_size != ident->lif.eth.rss_ind_tbl_sz) { IONIC_PRINT(ERR, "The size of hash lookup table configured " - "(%d) doesn't match the number hardware can supported " + "(%d) does not match the number hardware can support " "(%d)", reta_size, ident->lif.eth.rss_ind_tbl_sz); return -EINVAL; diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c index 722a89565..112bd54fa 100644 --- a/drivers/net/ionic/ionic_lif.c +++ b/drivers/net/ionic/ionic_lif.c @@ -84,7 +84,7 @@ ionic_lif_reset(struct ionic_lif *lif) ionic_dev_cmd_lif_reset(idev, lif->index); err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); if (err) - IONIC_PRINT(WARNING, "Failed to reset lif"); + IONIC_PRINT(WARNING, "Failed to reset %s", lif->name); } static void @@ -554,7 +554,7 @@ ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr) /* * Note: interrupt handler is called for index = 0 only * (we use interrupts for the notifyq only anyway, - * which hash index = 0) + * which has index = 0) */ for (index = 0; index < adapter->nintrs; index++) @@ -687,8 +687,8 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type, ionic_q_sg_map(&new->q, sg_base, sg_base_pa); } - IONIC_PRINT(DEBUG, "Q-Base-PA = %ju CQ-Base-PA = %ju " - "SG-base-PA = %ju", + IONIC_PRINT(DEBUG, "Q-Base-PA = %#jx CQ-Base-PA = %#jx " + "SG-base-PA = %#jx", q_base_pa, cq_base_pa, sg_base_pa); ionic_q_map(&new->q, q_base, q_base_pa); @@ -827,7 +827,13 @@ ionic_lif_alloc(struct ionic_lif *lif) int dbpage_num; int err; - snprintf(lif->name, sizeof(lif->name), "lif%u", lif->index); + /* + * lif->name was zeroed on allocation. + * Copy (sizeof() - 1) bytes to ensure that it is NULL terminated. + */ + memcpy(lif->name, lif->eth_dev->data->name, sizeof(lif->name) - 1); + + IONIC_PRINT(DEBUG, "LIF: %s", lif->name); IONIC_PRINT(DEBUG, "Allocating Lif Info"); @@ -868,8 +874,6 @@ ionic_lif_alloc(struct ionic_lif *lif) IONIC_PRINT(DEBUG, "Allocating Admin Queue"); - IONIC_PRINT(DEBUG, "Allocating Admin Queue"); - err = ionic_admin_qcq_alloc(lif); if (err) { IONIC_PRINT(ERR, "Cannot allocate admin queue"); @@ -1217,12 +1221,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif) } }; - IONIC_PRINT(DEBUG, "notifyq_init.index %d", - ctx.cmd.q_init.index); - IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "", - ctx.cmd.q_init.ring_base); + IONIC_PRINT(DEBUG, "notifyq_init.index %d", q->index); + IONIC_PRINT(DEBUG, "notifyq_init.ring_base %#jx", q->base_pa); IONIC_PRINT(DEBUG, "notifyq_init.ring_size %d", ctx.cmd.q_init.ring_size); + IONIC_PRINT(DEBUG, "notifyq_init.ver %u", ctx.cmd.q_init.ver); err = ionic_adminq_post_wait(lif, &ctx); if (err) @@ -1327,11 +1330,11 @@ ionic_lif_txq_init(struct ionic_qcq *qcq) }; int err; - IONIC_PRINT(DEBUG, "txq_init.index %d", ctx.cmd.q_init.index); - IONIC_PRINT(DEBUG, "txq_init.ring_base 0x%" PRIx64 "", - ctx.cmd.q_init.ring_base); - IONIC_PRINT(DEBUG, "txq_init.ring_size %d", - ctx.cmd.q_init.ring_size); + + IONIC_PRINT(DEBUG, "txq_init.index %d", q->index); + IONIC_PRINT(DEBUG, "txq_init.ring_base %#jx", q->base_pa); + IONIC_PRINT(DEBUG, "txq_init.ring_size %d", ctx.cmd.q_init.ring_size); + IONIC_PRINT(DEBUG, "txq_init.ver %u", ctx.cmd.q_init.ver); err = ionic_adminq_post_wait(qcq->lif, &ctx); if (err) @@ -1373,11 +1376,10 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq) }; int err; - IONIC_PRINT(DEBUG, "rxq_init.index %d", ctx.cmd.q_init.index); - IONIC_PRINT(DEBUG, "rxq_init.ring_base 0x%" PRIx64 "", - ctx.cmd.q_init.ring_base); - IONIC_PRINT(DEBUG, "rxq_init.ring_size %d", - ctx.cmd.q_init.ring_size); + IONIC_PRINT(DEBUG, "rxq_init.index %d", q->index); + IONIC_PRINT(DEBUG, "rxq_init.ring_base %#jx", q->base_pa); + IONIC_PRINT(DEBUG, "rxq_init.ring_size %d", ctx.cmd.q_init.ring_size); + IONIC_PRINT(DEBUG, "rxq_init.ver %u", ctx.cmd.q_init.ver); err = ionic_adminq_post_wait(qcq->lif, &ctx); if (err) @@ -1448,8 +1450,9 @@ ionic_lif_set_name(struct ionic_lif *lif) }, }; - snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name), - "%d", lif->port_id); + /* FW is responsible for NULL terminating this field */ + memcpy(ctx.cmd.lif_setattr.name, lif->name, + sizeof(ctx.cmd.lif_setattr.name)); ionic_adminq_post_wait(lif, &ctx); } @@ -1643,23 +1646,23 @@ ionic_lif_identify(struct ionic_adapter *adapter) for (i = 0; i < nwords; i++) ident->lif.words[i] = ioread32(&idev->dev_cmd->data[i]); - IONIC_PRINT(INFO, "capabilities 0x%" PRIx64 " ", + IONIC_PRINT(INFO, "capabilities %#jx", ident->lif.capabilities); - IONIC_PRINT(INFO, "eth.max_ucast_filters 0x%" PRIx32 " ", + IONIC_PRINT(INFO, "eth.max_ucast_filters %#x", ident->lif.eth.max_ucast_filters); - IONIC_PRINT(INFO, "eth.max_mcast_filters 0x%" PRIx32 " ", + IONIC_PRINT(INFO, "eth.max_mcast_filters %#x", ident->lif.eth.max_mcast_filters); - IONIC_PRINT(INFO, "eth.features 0x%" PRIx64 " ", + IONIC_PRINT(INFO, "eth.features %#jx", ident->lif.eth.config.features); - IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_ADMINQ] 0x%" PRIx32 " ", + IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_ADMINQ] %#x", ident->lif.eth.config.queue_count[IONIC_QTYPE_ADMINQ]); - IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_NOTIFYQ] 0x%" PRIx32 " ", + IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_NOTIFYQ] %#x", ident->lif.eth.config.queue_count[IONIC_QTYPE_NOTIFYQ]); - IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_RXQ] 0x%" PRIx32 " ", + IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_RXQ] %#x", ident->lif.eth.config.queue_count[IONIC_QTYPE_RXQ]); - IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_TXQ] 0x%" PRIx32 " ", + IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_TXQ] %#x", ident->lif.eth.config.queue_count[IONIC_QTYPE_TXQ]); return 0; @@ -1680,7 +1683,8 @@ ionic_lifs_size(struct ionic_adapter *adapter) nintrs = nlifs * 1 /* notifyq */; if (nintrs > dev_nintrs) { - IONIC_PRINT(ERR, "At most %d intr queues supported, minimum required is %u", + IONIC_PRINT(ERR, + "At most %d intr supported, minimum req'd is %u", dev_nintrs, nintrs); return -ENOSPC; } diff --git a/drivers/net/ionic/ionic_mac_api.c b/drivers/net/ionic/ionic_mac_api.c index c0ea042bc..7817b33e4 100644 --- a/drivers/net/ionic/ionic_mac_api.c +++ b/drivers/net/ionic/ionic_mac_api.c @@ -37,7 +37,7 @@ ionic_set_mac_type(struct ionic_hw *hw) IONIC_PRINT_CALL(); if (hw->vendor_id != IONIC_PENSANDO_VENDOR_ID) { - IONIC_PRINT(ERR, "Unsupported vendor id: %" PRIx32 "", + IONIC_PRINT(ERR, "Unsupported vendor id: %#x", hw->vendor_id); return -EINVAL; } @@ -50,7 +50,7 @@ ionic_set_mac_type(struct ionic_hw *hw) break; default: err = -EINVAL; - IONIC_PRINT(ERR, "Unsupported device id: %" PRIx32 "", + IONIC_PRINT(ERR, "Unsupported device id: %#x", hw->device_id); break; } diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c index 92cf0f398..ce5d11311 100644 --- a/drivers/net/ionic/ionic_main.c +++ b/drivers/net/ionic/ionic_main.c @@ -61,7 +61,7 @@ ionic_error_to_str(enum ionic_status_code code) } } -static const char * +const char * ionic_opcode_to_str(enum ionic_cmd_opcode opcode) { switch (opcode) { @@ -107,6 +107,8 @@ ionic_opcode_to_str(enum ionic_cmd_opcode opcode) return "IONIC_CMD_Q_INIT"; case IONIC_CMD_Q_CONTROL: return "IONIC_CMD_Q_CONTROL"; + case IONIC_CMD_Q_IDENTIFY: + return "IONIC_CMD_Q_IDENTIFY"; case IONIC_CMD_RDMA_RESET_LIF: return "IONIC_CMD_RDMA_RESET_LIF"; case IONIC_CMD_RDMA_CREATE_EQ: @@ -126,8 +128,9 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout) const char *name; const char *status; + name = ionic_opcode_to_str(ctx->cmd.cmd.opcode); + if (ctx->comp.comp.status || timeout) { - name = ionic_opcode_to_str(ctx->cmd.cmd.opcode); status = ionic_error_to_str(ctx->comp.comp.status); IONIC_PRINT(ERR, "%s (%d) failed: %s (%d)", name, @@ -137,6 +140,8 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout) return -EIO; } + IONIC_PRINT(DEBUG, "%s (%d) succeeded", name, ctx->cmd.cmd.opcode); + return 0; } @@ -174,14 +179,13 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) bool done; int err; - IONIC_PRINT(DEBUG, "Sending %s to the admin queue", - ionic_opcode_to_str(ctx->cmd.cmd.opcode)); + IONIC_PRINT(DEBUG, "Sending %s (%d) via the admin queue", + ionic_opcode_to_str(ctx->cmd.cmd.opcode), ctx->cmd.cmd.opcode); err = ionic_adminq_post(lif, ctx); if (err) { - IONIC_PRINT(ERR, "Failure posting to the admin queue %d (%d)", + IONIC_PRINT(ERR, "Failure posting %d to the admin queue (%d)", ctx->cmd.cmd.opcode, err); - return err; } @@ -244,6 +248,7 @@ ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait) if (!err) err = ionic_dev_cmd_check_error(idev); + IONIC_PRINT(DEBUG, "dev_cmd returned %d", err); return err; } @@ -335,12 +340,12 @@ ionic_port_identify(struct ionic_adapter *adapter) ioread32(&idev->dev_cmd->data[i]); } - IONIC_PRINT(INFO, "speed %d ", ident->port.config.speed); - IONIC_PRINT(INFO, "mtu %d ", ident->port.config.mtu); - IONIC_PRINT(INFO, "state %d ", ident->port.config.state); - IONIC_PRINT(INFO, "an_enable %d ", ident->port.config.an_enable); - IONIC_PRINT(INFO, "fec_type %d ", ident->port.config.fec_type); - IONIC_PRINT(INFO, "pause_type %d ", ident->port.config.pause_type); + IONIC_PRINT(INFO, "speed %d", ident->port.config.speed); + IONIC_PRINT(INFO, "mtu %d", ident->port.config.mtu); + IONIC_PRINT(INFO, "state %d", ident->port.config.state); + IONIC_PRINT(INFO, "an_enable %d", ident->port.config.an_enable); + IONIC_PRINT(INFO, "fec_type %d", ident->port.config.fec_type); + IONIC_PRINT(INFO, "pause_type %d", ident->port.config.pause_type); IONIC_PRINT(INFO, "loopback_mode %d", ident->port.config.loopback_mode); @@ -381,8 +386,7 @@ ionic_port_init(struct ionic_adapter *adapter) idev->port_info_sz = RTE_ALIGN(sizeof(*idev->port_info), PAGE_SIZE); snprintf(z_name, sizeof(z_name), "%s_port_%s_info", - IONIC_DRV_NAME, - adapter->pci_dev->device.name); + IONIC_DRV_NAME, adapter->name); idev->port_info_z = ionic_memzone_reserve(z_name, idev->port_info_sz, SOCKET_ID_ANY); diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c index b953aff49..b689c8381 100644 --- a/drivers/net/ionic/ionic_rxtx.c +++ b/drivers/net/ionic/ionic_rxtx.c @@ -133,7 +133,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id) { struct ionic_qcq *txq; - IONIC_PRINT_CALL(); + IONIC_PRINT(DEBUG, "Stopping TX queue %u", tx_queue_id); txq = eth_dev->data->tx_queues[tx_queue_id]; @@ -156,7 +156,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id) int __rte_cold ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id, - uint16_t nb_desc, uint32_t socket_id __rte_unused, + uint16_t nb_desc, uint32_t socket_id, const struct rte_eth_txconf *tx_conf) { struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); @@ -164,11 +164,6 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id, uint64_t offloads; int err; - IONIC_PRINT_CALL(); - - IONIC_PRINT(DEBUG, "Configuring TX queue %u with %u buffers", - tx_queue_id, nb_desc); - if (tx_queue_id >= lif->ntxqcqs) { IONIC_PRINT(DEBUG, "Queue index %u not available " "(max %u queues)", @@ -177,6 +172,9 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id, } offloads = tx_conf->offloads | eth_dev->data->dev_conf.txmode.offloads; + IONIC_PRINT(DEBUG, + "Configuring skt %u TX queue %u with %u buffers, offloads %jx", + socket_id, tx_queue_id, nb_desc, offloads); /* Validate number of receive descriptors */ if (!rte_is_power_of_2(nb_desc) || nb_desc < IONIC_MIN_RING_DESC) @@ -215,10 +213,11 @@ ionic_dev_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id) struct ionic_qcq *txq; int err; - IONIC_PRINT_CALL(); - txq = eth_dev->data->tx_queues[tx_queue_id]; + IONIC_PRINT(DEBUG, "Starting TX queue %u, %u descs", + tx_queue_id, txq->q.num_descs); + err = ionic_lif_txq_init(txq); if (err) return err; @@ -642,7 +641,7 @@ int __rte_cold ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id, uint16_t nb_desc, - uint32_t socket_id __rte_unused, + uint32_t socket_id, const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mp) { @@ -651,11 +650,6 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev, uint64_t offloads; int err; - IONIC_PRINT_CALL(); - - IONIC_PRINT(DEBUG, "Configuring RX queue %u with %u buffers", - rx_queue_id, nb_desc); - if (rx_queue_id >= lif->nrxqcqs) { IONIC_PRINT(ERR, "Queue index %u not available (max %u queues)", @@ -664,13 +658,16 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev, } offloads = rx_conf->offloads | eth_dev->data->dev_conf.rxmode.offloads; + IONIC_PRINT(DEBUG, + "Configuring skt %u RX queue %u with %u buffers, offloads %jx", + socket_id, rx_queue_id, nb_desc, offloads); /* Validate number of receive descriptors */ if (!rte_is_power_of_2(nb_desc) || nb_desc < IONIC_MIN_RING_DESC || nb_desc > IONIC_MAX_RING_DESC) { IONIC_PRINT(ERR, - "Bad number of descriptors (%u) for queue %u (min: %u)", + "Bad descriptor count (%u) for queue %u (min: %u)", nb_desc, rx_queue_id, IONIC_MIN_RING_DESC); return -EINVAL; /* or use IONIC_DEFAULT_RING_DESC */ } @@ -687,7 +684,7 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev, err = ionic_rx_qcq_alloc(lif, rx_queue_id, nb_desc, &rxq); if (err) { - IONIC_PRINT(ERR, "Queue allocation failure"); + IONIC_PRINT(ERR, "Queue %d allocation failure", rx_queue_id); return -EINVAL; } @@ -959,13 +956,11 @@ ionic_dev_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id) struct ionic_qcq *rxq; int err; - IONIC_PRINT_CALL(); - - IONIC_PRINT(DEBUG, "Allocating RX queue buffers (size: %u)", - frame_size); - rxq = eth_dev->data->rx_queues[rx_queue_id]; + IONIC_PRINT(DEBUG, "Starting RX queue %u, %u descs (size: %u)", + rx_queue_id, rxq->q.num_descs, frame_size); + err = ionic_lif_rxq_init(rxq); if (err) return err; @@ -1045,7 +1040,7 @@ ionic_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id) { struct ionic_qcq *rxq; - IONIC_PRINT_CALL(); + IONIC_PRINT(DEBUG, "Stopping RX queue %u", rx_queue_id); rxq = eth_dev->data->rx_queues[rx_queue_id];