From patchwork Wed Dec 2 10:11:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liron Himi X-Patchwork-Id: 84689 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 919CFA04DB; Wed, 2 Dec 2020 11:17:52 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2BAB4CA1E; Wed, 2 Dec 2020 11:12:55 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id CD7D1CA1E for ; Wed, 2 Dec 2020 11:12:53 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 0B2AAKqc024171 for ; Wed, 2 Dec 2020 02:12:52 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=U4C9JW9cVJNXhBDAozfPubHQfU5HhDf6a3SH4LElBxg=; b=TbOh6TltZ0oy8kbIgfCMlheFbHV1SXxPeO9CQINPSjy+6EIlH/m+CbrNq7vwYmpye669 LeyGhqt6fZ54MaegmOq3Uc51iS3OvbbymP6CxHersUyE6tQNZJLMYUHHwlRufbTYExL2 HKK7Zatf467wnZZCd0xpMffgZkJZEVcpnKxuQqugyDkg4cVUtf8DoeKfpHb3WqsM/eFz THPXsdnHhN/4Nd5Gi+2NksdrnSweyfSvKXx/zAnGVxtlXQMwXCl/aUq4RWZJ+rrWMck1 mYMd9+3CQFN1bkGtUENkL6/9ICM4iE1DmM7HrV8gtglVDMmLjLOWXNZt+VFMsJyEs8YV Qg== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0b-0016f401.pphosted.com with ESMTP id 355w509r5h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 02 Dec 2020 02:12:52 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 2 Dec 2020 02:12:50 -0800 Received: from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 2 Dec 2020 02:12:49 -0800 From: To: CC: , Yuri Chipchev , Liron Himi Date: Wed, 2 Dec 2020 12:11:51 +0200 Message-ID: <20201202101212.4717-18-lironh@marvell.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201202101212.4717-1-lironh@marvell.com> References: <20201202101212.4717-1-lironh@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.312, 18.0.737 definitions=2020-12-02_04:2020-11-30, 2020-12-02 signatures=0 Subject: [dpdk-dev] [PATCH v1 17/38] net/mvpp2: add TX flow control X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Yuri Chipchev add tx flow control operations. Signed-off-by: Yuri Chipchev Reviewed-by: Liron Himi Reviewed-by: Michael Shamis Signed-off-by: Yuri Chipchev Reviewed-by: Liron Himi Reviewed-by: Michael Shamis Signed-off-by: Yuri Chipchev Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 59 ++++++++++++++++++++++++++++----- 1 file changed, 51 insertions(+), 8 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index d1bb4c35a..f80843c63 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -2049,6 +2049,19 @@ mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE; + ret = pp2_ppio_get_tx_pause(priv->ppio, &en); + if (ret) { + MRVL_LOG(ERR, "Failed to read tx pause state"); + return ret; + } + + if (en) { + if (fc_conf->mode == RTE_FC_NONE) + fc_conf->mode = RTE_FC_TX_PAUSE; + else + fc_conf->mode = RTE_FC_FULL; + } + return 0; } @@ -2067,6 +2080,9 @@ static int mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) { struct mrvl_priv *priv = dev->data->dev_private; + struct pp2_ppio_tx_pause_params mrvl_pause_params; + int ret; + int rx_en, tx_en; if (!priv) return -EPERM; @@ -2081,16 +2097,43 @@ mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) return -EINVAL; } - if (fc_conf->mode == RTE_FC_NONE || - fc_conf->mode == RTE_FC_RX_PAUSE) { - int ret, en; + switch (fc_conf->mode) { + case RTE_FC_FULL: + rx_en = 1; + tx_en = 1; + break; + case RTE_FC_TX_PAUSE: + rx_en = 0; + tx_en = 1; + break; + case RTE_FC_RX_PAUSE: + rx_en = 1; + tx_en = 0; + break; + case RTE_FC_NONE: + rx_en = 0; + tx_en = 0; + break; + default: + MRVL_LOG(ERR, "Incorrect Flow control flag (%d)", + fc_conf->mode); + return -EINVAL; + } - en = fc_conf->mode == RTE_FC_NONE ? 0 : 1; - ret = pp2_ppio_set_rx_pause(priv->ppio, en); - if (ret) - MRVL_LOG(ERR, - "Failed to change flowctrl on RX side"); + /* Set RX flow control */ + ret = pp2_ppio_set_rx_pause(priv->ppio, rx_en); + if (ret) { + MRVL_LOG(ERR, "Failed to change RX flowctrl"); + return ret; + } + /* Set TX flow control */ + mrvl_pause_params.en = tx_en; + /* all inqs participate in xon/xoff decision */ + mrvl_pause_params.use_tc_pause_inqs = 0; + ret = pp2_ppio_set_tx_pause(priv->ppio, &mrvl_pause_params); + if (ret) { + MRVL_LOG(ERR, "Failed to change TX flowctrl"); return ret; }