From patchwork Mon Nov 16 17:02:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Leroy X-Patchwork-Id: 84245 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6EF7DA04B5; Mon, 16 Nov 2020 18:03:32 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DC644C8C6; Mon, 16 Nov 2020 18:03:15 +0100 (CET) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by dpdk.org (Postfix) with ESMTP id 71FAAC8BC for ; Mon, 16 Nov 2020 18:03:14 +0100 (CET) Received: by mail-wr1-f66.google.com with SMTP id b6so19483814wrt.4 for ; Mon, 16 Nov 2020 09:03:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=a5DPaEVfhghLzmgDlc0wCxFfdnGmdTpJeXFqzldBI2A=; b=F04WFJXyuqVYfYkdCo481dMSjL13TLzJBHMulm05igt8R4oTbA8XGvQYtmW+7wS5XU yI+lSHu8s3er1zbgG+G+hPcH5CR5BKL3n4MsNNrmBNCIL9hKUctO6bc19YPatIrzADYy LCLEyi+bGfzzmHZDWec+e/2vs6e+6FUDM+DdO/AKDGfquSfDAcmRc9dHqit3ApIVyzWM 5Bvyrh+vNJi6RK8ovrrevbAtzayVkqUi2kzDI0UbqS2h62gJe2AMW+gCP1kIC5+j8VGc mfs5ohyf0DcsLUs9Dq97kLbHJ9NhxrhmFzbf1kR68wzw7rULONNREckLvL1OcyR5m66E Dejg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=a5DPaEVfhghLzmgDlc0wCxFfdnGmdTpJeXFqzldBI2A=; b=BtCNfTCY7nepPA4YruUgsT35nK9K965sw3A8IUBqse/EHdlKMT5d43w+/KlqFRfDHu zOQjGCnKqliOPrlAgsWi3jy5YE/oqnzd/8WsrSbOnH7qozdnDYZV9Hm/njUeDQlh5uOd M+htio5t/pnoZ6MIWy/nalEoXI41BN2r5pf9KygjWlYOZwKG7EwHm6lrrrl4UjdjaAfi ua9Fmo2UITmBNT2U4ckO+UlTYCGayzuPwlal1N0bDv4NxWw8ppGzMMBgN9m5rjkqreqx mGAlhSViVH7iHdBOghn4XOIqsktty/s5xN8bqxDA/pgdZb+46BL1O32Ldt6Ja7UViJY1 /XvQ== X-Gm-Message-State: AOAM533bA/fVItG6NaOiRnRnH/VH/H4w/hoIYQj59racIEToWNQ985Kt Kqlgm4+UMmD2ZvgzP5XBQQ0EyQ== X-Google-Smtp-Source: ABdhPJwmtyanNRjUAiLorEiV+DZLZCn7woep6kD9NIUYvHe2rqp5aKhg5sG0OXLsZIYRpD/axYftAw== X-Received: by 2002:adf:fec6:: with SMTP id q6mr20665369wrs.168.1605546193210; Mon, 16 Nov 2020 09:03:13 -0800 (PST) Received: from bolet.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id l13sm24570935wrm.24.2020.11.16.09.03.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Nov 2020 09:03:12 -0800 (PST) From: Maxime Leroy To: Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko , Alexander Kozyrev Cc: dev@dpdk.org, Nelio Laranjeiro Date: Mon, 16 Nov 2020 18:02:57 +0100 Message-Id: <20201116170258.18583-2-maxime.leroy@6wind.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201116170258.18583-1-maxime.leroy@6wind.com> References: <20201116170258.18583-1-maxime.leroy@6wind.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 1/2] net/mlx5: fix Rx queue count calculation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The commit d2d57605522d ("net/mlx5: fix Rx queue count calculation") is incorrect because the count calculation is wrong for the next cqe: Example: Compressed Set of packets 1 | Compressed Set of packets 2 C | a | e0 | e1 | e2 | e3 | e4 | e5 | C | a | e0 There are 2 compressed set of packets in the first queue. For the first set, n is computed correctly. But for the second, n is not computed properly. Because the zip context is for the first set. The second set is not yet decompressed, so there are no context. To fix the issue, we should only use the zip context for the first CQEs series. Fixes: d2d57605522d ("net/mlx5: fix Rx queue count calculation") Signed-off-by: Maxime Leroy Signed-off-by: Nelio Laranjeiro Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_rxtx.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index 844a1c63..2733dcd3 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -462,11 +462,18 @@ rx_queue_count(struct mlx5_rxq_data *rxq) { struct rxq_zip *zip = &rxq->zip; volatile struct mlx5_cqe *cqe; - unsigned int cq_ci = rxq->cq_ci; const unsigned int cqe_n = (1 << rxq->cqe_n); const unsigned int cqe_cnt = cqe_n - 1; - unsigned int used = 0; + unsigned int cq_ci, used; + /* if we are processing a compressed cqe */ + if (zip->ai) { + used = zip->cqe_cnt - zip->ai; + cq_ci = zip->cq_ci; + } else { + used = 0; + cq_ci = rxq->cq_ci; + } cqe = &(*rxq->cqes)[cq_ci & cqe_cnt]; while (check_cqe(cqe, cqe_n, cq_ci) != MLX5_CQE_STATUS_HW_OWN) { int8_t op_own; @@ -474,10 +481,7 @@ rx_queue_count(struct mlx5_rxq_data *rxq) op_own = cqe->op_own; if (MLX5_CQE_FORMAT(op_own) == MLX5_COMPRESSED) - if (unlikely(zip->ai)) - n = zip->cqe_cnt - zip->ai; - else - n = rte_be_to_cpu_32(cqe->byte_cnt); + n = rte_be_to_cpu_32(cqe->byte_cnt); else n = 1; cq_ci += n;