From patchwork Mon Sep 28 06:55:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Yang X-Patchwork-Id: 78974 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6D54BA04C0; Mon, 28 Sep 2020 09:08:25 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E1EAF1C137; Mon, 28 Sep 2020 09:07:24 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id 3E4441C1DF for ; Mon, 28 Sep 2020 09:07:16 +0200 (CEST) IronPort-SDR: MepZVLrJow+8xNZeNKsHF1MG7ZvqXubCpuM0aC/XsEiwKzY4nJyX7abfwk0k+gT+D+8h4m3zY2 ts4B5KLZvWbQ== X-IronPort-AV: E=McAfee;i="6000,8403,9757"; a="141966839" X-IronPort-AV: E=Sophos;i="5.77,313,1596524400"; d="scan'208";a="141966839" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2020 00:07:15 -0700 IronPort-SDR: jRr20hBdKImUwatOwWmJaam14+IgDYibFui6eYDR0eKRMx1XQGRNJNpS8W7oOKmTyJj89WVTpq AtI3wHG9FVWQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,313,1596524400"; d="scan'208";a="414895776" Received: from intel-npg-odc-srv01.cd.intel.com ([10.240.178.136]) by fmsmga001.fm.intel.com with ESMTP; 28 Sep 2020 00:07:13 -0700 From: SteveX Yang To: dev@dpdk.org Cc: wei.zhao1@intel.com, jia.guo@intel.com, qiming.yang@intel.com, qi.z.zhang@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com, konstantin.ananyev@intel.com, SteveX Yang Date: Mon, 28 Sep 2020 06:55:40 +0000 Message-Id: <20200928065541.7520-5-stevex.yang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200928065541.7520-1-stevex.yang@intel.com> References: <20200923040909.73418-1-stevex.yang@intel.com> <20200928065541.7520-1-stevex.yang@intel.com> Subject: [dpdk-dev] [PATCH v4 4/5] net/i40e: fix max mtu size packets with vlan tag cannot be received by default X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" testpmd will initialize default max packet length to 1518 which doesn't include vlan tag size in ether overheader. Once, send the max mtu length packet with vlan tag, the max packet length will exceed 1518 that will cause packets dropped directly from NIC hw side. But for i40e/i40evf, they should support dual vlan tags that need more 8 bytes for max packet size, so, configure the correct max packet size in dev_config ops. Fixes: ff8282f4bbcd ("net/i40e: consider QinQ when setting MTU") Signed-off-by: SteveX Yang --- drivers/net/i40e/i40e_ethdev.c | 11 +++++++++++ drivers/net/i40e/i40e_ethdev_vf.c | 13 ++++++++++++- 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 6439baf2f..35ffe33ab 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1916,6 +1916,7 @@ i40e_dev_configure(struct rte_eth_dev *dev) struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); enum rte_eth_rx_mq_mode mq_mode = dev->data->dev_conf.rxmode.mq_mode; + uint32_t frame_size = dev->data->mtu + I40E_ETH_OVERHEAD; int i, ret; ret = i40e_dev_sync_phy_type(hw); @@ -1930,6 +1931,16 @@ i40e_dev_configure(struct rte_eth_dev *dev) ad->tx_simple_allowed = true; ad->tx_vec_allowed = true; + /** + * Considering QinQ packet, max frame size should be equal or + * larger than total size of MTU and Ether overhead. + */ + if (frame_size > dev->data->dev_conf.rxmode.max_rx_pkt_len) { + ret = i40e_dev_mtu_set(dev, dev->data->mtu); + if (ret != 0) + return ret; + } + if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c index 8531cf6b1..e3c809037 100644 --- a/drivers/net/i40e/i40e_ethdev_vf.c +++ b/drivers/net/i40e/i40e_ethdev_vf.c @@ -1669,6 +1669,8 @@ i40evf_dev_configure(struct rte_eth_dev *dev) I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, dev->data->nb_tx_queues); + uint32_t frame_size = dev->data->mtu + I40E_ETH_OVERHEAD; + int ret; /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk * allocation or vector Rx preconditions we will reset it. @@ -1681,9 +1683,18 @@ i40evf_dev_configure(struct rte_eth_dev *dev) dev->data->dev_conf.intr_conf.lsc = !!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC); + /** + * Considering QinQ packet, max frame size should be equal or + * larger than total size of MTU and Ether overhead. + */ + if (frame_size > dev->data->dev_conf.rxmode.max_rx_pkt_len) { + ret = i40evf_dev_mtu_set(dev, dev->data->mtu); + if (ret != 0) + return ret; + } + if (num_queue_pairs > vf->vsi_res->num_queue_pairs) { struct i40e_hw *hw; - int ret; if (rte_eal_process_type() != RTE_PROC_PRIMARY) { PMD_DRV_LOG(ERR,