diff mbox series

[v2,27/51] net/bnxt: align CFA resources with RM

Message ID	20200701065212.41391-28-ajit.khaparde@broadcom.com (mailing list archive)
State	Changes Requested, archived
Delegated to:	Ajit Khaparde
Headers	From: Ajit Khaparde <ajit.khaparde@broadcom.com> To: dev@dpdk.org Cc: Randy Schacher <stuart.schacher@broadcom.com>, Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com> Date: Tue, 30 Jun 2020 23:51:48 -0700 Message-Id: <20200701065212.41391-28-ajit.khaparde@broadcom.com> In-Reply-To: <20200701065212.41391-1-ajit.khaparde@broadcom.com> References: <20200612132934.16488-1-somnath.kotur@broadcom.com> <20200701065212.41391-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2 27/51] net/bnxt: align CFA resources with RM Precedence: list Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org>
Series	add features for host-based flow management \| [v2,00/51] add features for host-based flow management [v2,01/51] net/bnxt: add basic infrastructure for VF representors [v2,02/51] net/bnxt: add support for VF-reps data path [v2,03/51] net/bnxt: get IDs for VF-Rep endpoint [v2,04/51] net/bnxt: initialize parent PF information [v2,05/51] net/bnxt: modify port db dev interface [v2,06/51] net/bnxt: get port and function info [v2,07/51] net/bnxt: add support for hwrm port phy qcaps [v2,08/51] net/bnxt: modify port db to handle more info [v2,09/51] net/bnxt: add support for exact match [v2,10/51] net/bnxt: modify EM insert and delete to use HWRM direct [v2,11/51] net/bnxt: add multi device support [v2,12/51] net/bnxt: support bulk table get and mirror [v2,13/51] net/bnxt: update multi device design support [v2,14/51] net/bnxt: support two-level priority for TCAMs [v2,15/51] net/bnxt: add HCAPI interface support [v2,16/51] net/bnxt: add core changes for EM and EEM lookups [v2,17/51] net/bnxt: implement support for TCAM access [v2,18/51] net/bnxt: multiple device implementation [v2,19/51] net/bnxt: update identifier with remap support [v2,20/51] net/bnxt: update RM with residual checker [v2,21/51] net/bnxt: support two level priority for TCAMs [v2,22/51] net/bnxt: support EM and TCAM lookup with table scope [v2,23/51] net/bnxt: update table get to use new design [v2,24/51] net/bnxt: update RM to support HCAPI only [v2,25/51] net/bnxt: remove table scope from session [v2,26/51] net/bnxt: add external action alloc and free [v2,27/51] net/bnxt: align CFA resources with RM [v2,28/51] net/bnxt: implement IF tables set and get [v2,29/51] net/bnxt: add TF register and unregister [v2,30/51] net/bnxt: add global config set and get APIs [v2,31/51] net/bnxt: add support for EEM System memory [v2,32/51] net/bnxt: integrate with the latest tf core changes [v2,33/51] net/bnxt: add support for internal encap records [v2,34/51] net/bnxt: add support for if table processing [v2,35/51] net/bnxt: disable Tx vector mode if truflow is enabled [v2,36/51] net/bnxt: add index opcode and operand to mapper table [v2,37/51] net/bnxt: add support for global resource templates [v2,38/51] net/bnxt: add support for internal exact match entries [v2,39/51] net/bnxt: add support for conditional execution of mapper tables [v2,40/51] net/bnxt: enable port MAC qcfg command for trusted VF [v2,41/51] net/bnxt: enhancements for port db [v2,42/51] net/bnxt: manage VF to VFR conduit [v2,43/51] net/bnxt: parse representor along with other dev-args [v2,44/51] net/bnxt: fill mapper parameters with default rules info [v2,45/51] net/bnxt: add VF-rep and stat templates [v2,46/51] net/bnxt: create default flow rules for the VF-rep conduit [v2,47/51] net/bnxt: add port default rules for ingress and egress [v2,48/51] net/bnxt: fill cfa action in the Tx descriptor [v2,49/51] net/bnxt: add ULP Flow counter Manager [v2,50/51] net/bnxt: add support for count action in flow query [v2,51/51] doc: update release notes

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK
ci/Intel-compilation	fail	Compilation issues

Commit Message

Ajit Khaparde July 1, 2020, 6:51 a.m. UTC

From: Randy Schacher <stuart.schacher@broadcom.com>

- HCAPI resources need to align for Resource Manager
- Clean up unnecessary debug messages

Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/tf_core/cfa_resource_types.h | 250 +++++++++---------
 drivers/net/bnxt/tf_core/tf_identifier.c      |   3 +-
 drivers/net/bnxt/tf_core/tf_msg.c             |  37 ++-
 drivers/net/bnxt/tf_core/tf_rm.c              |  21 +-
 drivers/net/bnxt/tf_core/tf_tbl.c             |   3 +-
 drivers/net/bnxt/tf_core/tf_tcam.c            |  28 +-
 6 files changed, 197 insertions(+), 145 deletions(-)

diff mbox series

Patch

diff --git a/drivers/net/bnxt/tf_core/cfa_resource_types.h b/drivers/net/bnxt/tf_core/cfa_resource_types.h
index 6e79facec..6d6651fde 100644
--- a/drivers/net/bnxt/tf_core/cfa_resource_types.h
+++ b/drivers/net/bnxt/tf_core/cfa_resource_types.h
@@ -48,232 +48,246 @@ 
 #define CFA_RESOURCE_TYPE_P59_TBL_SCOPE       0xdUL
 /* L2 Func */
 #define CFA_RESOURCE_TYPE_P59_L2_FUNC         0xeUL
-/* EPOCH */
-#define CFA_RESOURCE_TYPE_P59_EPOCH           0xfUL
+/* EPOCH 0 */
+#define CFA_RESOURCE_TYPE_P59_EPOCH0          0xfUL
+/* EPOCH 1 */
+#define CFA_RESOURCE_TYPE_P59_EPOCH1          0x10UL
 /* Metadata */
-#define CFA_RESOURCE_TYPE_P59_METADATA        0x10UL
+#define CFA_RESOURCE_TYPE_P59_METADATA        0x11UL
 /* Connection Tracking Rule TCAM */
-#define CFA_RESOURCE_TYPE_P59_CT_RULE_TCAM    0x11UL
+#define CFA_RESOURCE_TYPE_P59_CT_RULE_TCAM    0x12UL
 /* Range Profile */
-#define CFA_RESOURCE_TYPE_P59_RANGE_PROF      0x12UL
+#define CFA_RESOURCE_TYPE_P59_RANGE_PROF      0x13UL
 /* Range */
-#define CFA_RESOURCE_TYPE_P59_RANGE           0x13UL
+#define CFA_RESOURCE_TYPE_P59_RANGE           0x14UL
 /* Link Aggrigation */
-#define CFA_RESOURCE_TYPE_P59_LAG             0x14UL
+#define CFA_RESOURCE_TYPE_P59_LAG             0x15UL
 /* VEB TCAM */
-#define CFA_RESOURCE_TYPE_P59_VEB_TCAM        0x15UL
+#define CFA_RESOURCE_TYPE_P59_VEB_TCAM        0x16UL
 #define CFA_RESOURCE_TYPE_P59_LAST           CFA_RESOURCE_TYPE_P59_VEB_TCAM
 
 
 /* Multicast Group */
-#define CFA_RESOURCE_TYPE_P58_MCG             0x0UL
+#define CFA_RESOURCE_TYPE_P58_MCG                 0x0UL
 /* Encap 8 byte record */
-#define CFA_RESOURCE_TYPE_P58_ENCAP_8B        0x1UL
+#define CFA_RESOURCE_TYPE_P58_ENCAP_8B            0x1UL
 /* Encap 16 byte record */
-#define CFA_RESOURCE_TYPE_P58_ENCAP_16B       0x2UL
+#define CFA_RESOURCE_TYPE_P58_ENCAP_16B           0x2UL
 /* Encap 64 byte record */
-#define CFA_RESOURCE_TYPE_P58_ENCAP_64B       0x3UL
+#define CFA_RESOURCE_TYPE_P58_ENCAP_64B           0x3UL
 /* Source Property MAC */
-#define CFA_RESOURCE_TYPE_P58_SP_MAC          0x4UL
+#define CFA_RESOURCE_TYPE_P58_SP_MAC              0x4UL
 /* Source Property MAC and IPv4 */
-#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV4     0x5UL
+#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV4         0x5UL
 /* Source Property MAC and IPv6 */
-#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV6     0x6UL
+#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV6         0x6UL
 /* Network Address Translation Source Port */
-#define CFA_RESOURCE_TYPE_P58_NAT_SPORT       0x7UL
+#define CFA_RESOURCE_TYPE_P58_NAT_SPORT           0x7UL
 /* Network Address Translation Destination Port */
-#define CFA_RESOURCE_TYPE_P58_NAT_DPORT       0x8UL
+#define CFA_RESOURCE_TYPE_P58_NAT_DPORT           0x8UL
 /* Network Address Translation Source IPv4 address */
-#define CFA_RESOURCE_TYPE_P58_NAT_S_IPV4      0x9UL
+#define CFA_RESOURCE_TYPE_P58_NAT_S_IPV4          0x9UL
 /* Network Address Translation Destination IPv4 address */
-#define CFA_RESOURCE_TYPE_P58_NAT_D_IPV4      0xaUL
-/* Network Address Translation Source IPv4 address */
-#define CFA_RESOURCE_TYPE_P58_NAT_S_IPV6      0xbUL
-/* Network Address Translation Destination IPv4 address */
-#define CFA_RESOURCE_TYPE_P58_NAT_D_IPV6      0xcUL
+#define CFA_RESOURCE_TYPE_P58_NAT_D_IPV4          0xaUL
 /* Meter */
-#define CFA_RESOURCE_TYPE_P58_METER           0xdUL
+#define CFA_RESOURCE_TYPE_P58_METER               0xbUL
 /* Flow State */
-#define CFA_RESOURCE_TYPE_P58_FLOW_STATE      0xeUL
+#define CFA_RESOURCE_TYPE_P58_FLOW_STATE          0xcUL
 /* Full Action Records */
-#define CFA_RESOURCE_TYPE_P58_FULL_ACTION     0xfUL
+#define CFA_RESOURCE_TYPE_P58_FULL_ACTION         0xdUL
 /* Action Record Format 0 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_0_ACTION 0x10UL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_0_ACTION     0xeUL
+/* Action Record Ext Format 0 */
+#define CFA_RESOURCE_TYPE_P58_EXT_FORMAT_0_ACTION 0xfUL
+/* Action Record Format 1 */
+#define CFA_RESOURCE_TYPE_P58_FORMAT_1_ACTION     0x10UL
 /* Action Record Format 2 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_2_ACTION 0x11UL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_2_ACTION     0x11UL
 /* Action Record Format 3 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_3_ACTION 0x12UL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_3_ACTION     0x12UL
 /* Action Record Format 4 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_4_ACTION 0x13UL
+#define CFA_RESOURCE_TYPE_P58_FORMAT_4_ACTION     0x13UL
+/* Action Record Format 5 */
+#define CFA_RESOURCE_TYPE_P58_FORMAT_5_ACTION     0x14UL
+/* Action Record Format 6 */
+#define CFA_RESOURCE_TYPE_P58_FORMAT_6_ACTION     0x15UL
 /* L2 Context TCAM */
-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM    0x14UL
+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM        0x16UL
 /* L2 Context REMAP */
-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP   0x15UL
+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP       0x17UL
 /* Profile Func */
-#define CFA_RESOURCE_TYPE_P58_PROF_FUNC       0x16UL
+#define CFA_RESOURCE_TYPE_P58_PROF_FUNC           0x18UL
 /* Profile TCAM */
-#define CFA_RESOURCE_TYPE_P58_PROF_TCAM       0x17UL
+#define CFA_RESOURCE_TYPE_P58_PROF_TCAM           0x19UL
 /* Exact Match Profile Id */
-#define CFA_RESOURCE_TYPE_P58_EM_PROF_ID      0x18UL
+#define CFA_RESOURCE_TYPE_P58_EM_PROF_ID          0x1aUL
 /* Wildcard Profile Id */
-#define CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID 0x19UL
+#define CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID     0x1bUL
 /* Exact Match Record */
-#define CFA_RESOURCE_TYPE_P58_EM_REC          0x1aUL
+#define CFA_RESOURCE_TYPE_P58_EM_REC              0x1cUL
 /* Wildcard TCAM */
-#define CFA_RESOURCE_TYPE_P58_WC_TCAM         0x1bUL
+#define CFA_RESOURCE_TYPE_P58_WC_TCAM             0x1dUL
 /* Meter profile */
-#define CFA_RESOURCE_TYPE_P58_METER_PROF      0x1cUL
+#define CFA_RESOURCE_TYPE_P58_METER_PROF          0x1eUL
 /* Meter */
-#define CFA_RESOURCE_TYPE_P58_MIRROR          0x1dUL
+#define CFA_RESOURCE_TYPE_P58_MIRROR              0x1fUL
 /* Source Property TCAM */
-#define CFA_RESOURCE_TYPE_P58_SP_TCAM         0x1eUL
+#define CFA_RESOURCE_TYPE_P58_SP_TCAM             0x20UL
 /* Exact Match Flexible Key Builder */
-#define CFA_RESOURCE_TYPE_P58_EM_FKB          0x1fUL
+#define CFA_RESOURCE_TYPE_P58_EM_FKB              0x21UL
 /* Wildcard Flexible Key Builder */
-#define CFA_RESOURCE_TYPE_P58_WC_FKB          0x20UL
+#define CFA_RESOURCE_TYPE_P58_WC_FKB              0x22UL
 /* VEB TCAM */
-#define CFA_RESOURCE_TYPE_P58_VEB_TCAM        0x21UL
-#define CFA_RESOURCE_TYPE_P58_LAST           CFA_RESOURCE_TYPE_P58_VEB_TCAM
+#define CFA_RESOURCE_TYPE_P58_VEB_TCAM            0x23UL
+#define CFA_RESOURCE_TYPE_P58_LAST               CFA_RESOURCE_TYPE_P58_VEB_TCAM
 
 
 /* Multicast Group */
-#define CFA_RESOURCE_TYPE_P45_MCG             0x0UL
+#define CFA_RESOURCE_TYPE_P45_MCG                 0x0UL
 /* Encap 8 byte record */
-#define CFA_RESOURCE_TYPE_P45_ENCAP_8B        0x1UL
+#define CFA_RESOURCE_TYPE_P45_ENCAP_8B            0x1UL
 /* Encap 16 byte record */
-#define CFA_RESOURCE_TYPE_P45_ENCAP_16B       0x2UL
+#define CFA_RESOURCE_TYPE_P45_ENCAP_16B           0x2UL
 /* Encap 64 byte record */
-#define CFA_RESOURCE_TYPE_P45_ENCAP_64B       0x3UL
+#define CFA_RESOURCE_TYPE_P45_ENCAP_64B           0x3UL
 /* Source Property MAC */
-#define CFA_RESOURCE_TYPE_P45_SP_MAC          0x4UL
+#define CFA_RESOURCE_TYPE_P45_SP_MAC              0x4UL
 /* Source Property MAC and IPv4 */
-#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV4     0x5UL
+#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV4         0x5UL
 /* Source Property MAC and IPv6 */
-#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV6     0x6UL
+#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV6         0x6UL
 /* 64B Counters */
-#define CFA_RESOURCE_TYPE_P45_COUNTER_64B     0x7UL
+#define CFA_RESOURCE_TYPE_P45_COUNTER_64B         0x7UL
 /* Network Address Translation Source Port */
-#define CFA_RESOURCE_TYPE_P45_NAT_SPORT       0x8UL
+#define CFA_RESOURCE_TYPE_P45_NAT_SPORT           0x8UL
 /* Network Address Translation Destination Port */
-#define CFA_RESOURCE_TYPE_P45_NAT_DPORT       0x9UL
+#define CFA_RESOURCE_TYPE_P45_NAT_DPORT           0x9UL
 /* Network Address Translation Source IPv4 address */
-#define CFA_RESOURCE_TYPE_P45_NAT_S_IPV4      0xaUL
+#define CFA_RESOURCE_TYPE_P45_NAT_S_IPV4          0xaUL
 /* Network Address Translation Destination IPv4 address */
-#define CFA_RESOURCE_TYPE_P45_NAT_D_IPV4      0xbUL
-/* Network Address Translation Source IPv6 address */
-#define CFA_RESOURCE_TYPE_P45_NAT_S_IPV6      0xcUL
-/* Network Address Translation Destination IPv6 address */
-#define CFA_RESOURCE_TYPE_P45_NAT_D_IPV6      0xdUL
+#define CFA_RESOURCE_TYPE_P45_NAT_D_IPV4          0xbUL
 /* Meter */
-#define CFA_RESOURCE_TYPE_P45_METER           0xeUL
+#define CFA_RESOURCE_TYPE_P45_METER               0xcUL
 /* Flow State */
-#define CFA_RESOURCE_TYPE_P45_FLOW_STATE      0xfUL
+#define CFA_RESOURCE_TYPE_P45_FLOW_STATE          0xdUL
 /* Full Action Records */
-#define CFA_RESOURCE_TYPE_P45_FULL_ACTION     0x10UL
+#define CFA_RESOURCE_TYPE_P45_FULL_ACTION         0xeUL
 /* Action Record Format 0 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_0_ACTION 0x11UL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_0_ACTION     0xfUL
+/* Action Record Ext Format 0 */
+#define CFA_RESOURCE_TYPE_P45_EXT_FORMAT_0_ACTION 0x10UL
+/* Action Record Format 1 */
+#define CFA_RESOURCE_TYPE_P45_FORMAT_1_ACTION     0x11UL
 /* Action Record Format 2 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_2_ACTION 0x12UL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_2_ACTION     0x12UL
 /* Action Record Format 3 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_3_ACTION 0x13UL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_3_ACTION     0x13UL
 /* Action Record Format 4 */
-#define CFA_RESOURCE_TYPE_P45_FORMAT_4_ACTION 0x14UL
+#define CFA_RESOURCE_TYPE_P45_FORMAT_4_ACTION     0x14UL
+/* Action Record Format 5 */
+#define CFA_RESOURCE_TYPE_P45_FORMAT_5_ACTION     0x15UL
+/* Action Record Format 6 */
+#define CFA_RESOURCE_TYPE_P45_FORMAT_6_ACTION     0x16UL
 /* L2 Context TCAM */
-#define CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM    0x15UL
+#define CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM        0x17UL
 /* L2 Context REMAP */
-#define CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP   0x16UL
+#define CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP       0x18UL
 /* Profile Func */
-#define CFA_RESOURCE_TYPE_P45_PROF_FUNC       0x17UL
+#define CFA_RESOURCE_TYPE_P45_PROF_FUNC           0x19UL
 /* Profile TCAM */
-#define CFA_RESOURCE_TYPE_P45_PROF_TCAM       0x18UL
+#define CFA_RESOURCE_TYPE_P45_PROF_TCAM           0x1aUL
 /* Exact Match Profile Id */
-#define CFA_RESOURCE_TYPE_P45_EM_PROF_ID      0x19UL
+#define CFA_RESOURCE_TYPE_P45_EM_PROF_ID          0x1bUL
 /* Exact Match Record */
-#define CFA_RESOURCE_TYPE_P45_EM_REC          0x1aUL
+#define CFA_RESOURCE_TYPE_P45_EM_REC              0x1cUL
 /* Wildcard Profile Id */
-#define CFA_RESOURCE_TYPE_P45_WC_TCAM_PROF_ID 0x1bUL
+#define CFA_RESOURCE_TYPE_P45_WC_TCAM_PROF_ID     0x1dUL
 /* Wildcard TCAM */
-#define CFA_RESOURCE_TYPE_P45_WC_TCAM         0x1cUL
+#define CFA_RESOURCE_TYPE_P45_WC_TCAM             0x1eUL
 /* Meter profile */
-#define CFA_RESOURCE_TYPE_P45_METER_PROF      0x1dUL
+#define CFA_RESOURCE_TYPE_P45_METER_PROF          0x1fUL
 /* Meter */
-#define CFA_RESOURCE_TYPE_P45_MIRROR          0x1eUL
+#define CFA_RESOURCE_TYPE_P45_MIRROR              0x20UL
 /* Source Property TCAM */
-#define CFA_RESOURCE_TYPE_P45_SP_TCAM         0x1fUL
+#define CFA_RESOURCE_TYPE_P45_SP_TCAM             0x21UL
 /* VEB TCAM */
-#define CFA_RESOURCE_TYPE_P45_VEB_TCAM        0x20UL
+#define CFA_RESOURCE_TYPE_P45_VEB_TCAM            0x22UL
 /* Table Scope */
-#define CFA_RESOURCE_TYPE_P45_TBL_SCOPE       0x21UL
-#define CFA_RESOURCE_TYPE_P45_LAST           CFA_RESOURCE_TYPE_P45_TBL_SCOPE
+#define CFA_RESOURCE_TYPE_P45_TBL_SCOPE           0x23UL
+#define CFA_RESOURCE_TYPE_P45_LAST               CFA_RESOURCE_TYPE_P45_TBL_SCOPE
 
 
 /* Multicast Group */
-#define CFA_RESOURCE_TYPE_P4_MCG             0x0UL
+#define CFA_RESOURCE_TYPE_P4_MCG                 0x0UL
 /* Encap 8 byte record */
-#define CFA_RESOURCE_TYPE_P4_ENCAP_8B        0x1UL
+#define CFA_RESOURCE_TYPE_P4_ENCAP_8B            0x1UL
 /* Encap 16 byte record */
-#define CFA_RESOURCE_TYPE_P4_ENCAP_16B       0x2UL
+#define CFA_RESOURCE_TYPE_P4_ENCAP_16B           0x2UL
 /* Encap 64 byte record */
-#define CFA_RESOURCE_TYPE_P4_ENCAP_64B       0x3UL
+#define CFA_RESOURCE_TYPE_P4_ENCAP_64B           0x3UL
 /* Source Property MAC */
-#define CFA_RESOURCE_TYPE_P4_SP_MAC          0x4UL
+#define CFA_RESOURCE_TYPE_P4_SP_MAC              0x4UL
 /* Source Property MAC and IPv4 */
-#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4     0x5UL
+#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4         0x5UL
 /* Source Property MAC and IPv6 */
-#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6     0x6UL
+#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6         0x6UL
 /* 64B Counters */
-#define CFA_RESOURCE_TYPE_P4_COUNTER_64B     0x7UL
+#define CFA_RESOURCE_TYPE_P4_COUNTER_64B         0x7UL
 /* Network Address Translation Source Port */
-#define CFA_RESOURCE_TYPE_P4_NAT_SPORT       0x8UL
+#define CFA_RESOURCE_TYPE_P4_NAT_SPORT           0x8UL
 /* Network Address Translation Destination Port */
-#define CFA_RESOURCE_TYPE_P4_NAT_DPORT       0x9UL
+#define CFA_RESOURCE_TYPE_P4_NAT_DPORT           0x9UL
 /* Network Address Translation Source IPv4 address */
-#define CFA_RESOURCE_TYPE_P4_NAT_S_IPV4      0xaUL
+#define CFA_RESOURCE_TYPE_P4_NAT_S_IPV4          0xaUL
 /* Network Address Translation Destination IPv4 address */
-#define CFA_RESOURCE_TYPE_P4_NAT_D_IPV4      0xbUL
-/* Network Address Translation Source IPv6 address */
-#define CFA_RESOURCE_TYPE_P4_NAT_S_IPV6      0xcUL
-/* Network Address Translation Destination IPv6 address */
-#define CFA_RESOURCE_TYPE_P4_NAT_D_IPV6      0xdUL
+#define CFA_RESOURCE_TYPE_P4_NAT_D_IPV4          0xbUL
 /* Meter */
-#define CFA_RESOURCE_TYPE_P4_METER           0xeUL
+#define CFA_RESOURCE_TYPE_P4_METER               0xcUL
 /* Flow State */
-#define CFA_RESOURCE_TYPE_P4_FLOW_STATE      0xfUL
+#define CFA_RESOURCE_TYPE_P4_FLOW_STATE          0xdUL
 /* Full Action Records */
-#define CFA_RESOURCE_TYPE_P4_FULL_ACTION     0x10UL
+#define CFA_RESOURCE_TYPE_P4_FULL_ACTION         0xeUL
 /* Action Record Format 0 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION 0x11UL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION     0xfUL
+/* Action Record Ext Format 0 */
+#define CFA_RESOURCE_TYPE_P4_EXT_FORMAT_0_ACTION 0x10UL
+/* Action Record Format 1 */
+#define CFA_RESOURCE_TYPE_P4_FORMAT_1_ACTION     0x11UL
 /* Action Record Format 2 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION 0x12UL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION     0x12UL
 /* Action Record Format 3 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION 0x13UL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION     0x13UL
 /* Action Record Format 4 */
-#define CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION 0x14UL
+#define CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION     0x14UL
+/* Action Record Format 5 */
+#define CFA_RESOURCE_TYPE_P4_FORMAT_5_ACTION     0x15UL
+/* Action Record Format 6 */
+#define CFA_RESOURCE_TYPE_P4_FORMAT_6_ACTION     0x16UL
 /* L2 Context TCAM */
-#define CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM    0x15UL
+#define CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM        0x17UL
 /* L2 Context REMAP */
-#define CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP   0x16UL
+#define CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP       0x18UL
 /* Profile Func */
-#define CFA_RESOURCE_TYPE_P4_PROF_FUNC       0x17UL
+#define CFA_RESOURCE_TYPE_P4_PROF_FUNC           0x19UL
 /* Profile TCAM */
-#define CFA_RESOURCE_TYPE_P4_PROF_TCAM       0x18UL
+#define CFA_RESOURCE_TYPE_P4_PROF_TCAM           0x1aUL
 /* Exact Match Profile Id */
-#define CFA_RESOURCE_TYPE_P4_EM_PROF_ID      0x19UL
+#define CFA_RESOURCE_TYPE_P4_EM_PROF_ID          0x1bUL
 /* Exact Match Record */
-#define CFA_RESOURCE_TYPE_P4_EM_REC          0x1aUL
+#define CFA_RESOURCE_TYPE_P4_EM_REC              0x1cUL
 /* Wildcard Profile Id */
-#define CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID 0x1bUL
+#define CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID     0x1dUL
 /* Wildcard TCAM */
-#define CFA_RESOURCE_TYPE_P4_WC_TCAM         0x1cUL
+#define CFA_RESOURCE_TYPE_P4_WC_TCAM             0x1eUL
 /* Meter profile */
-#define CFA_RESOURCE_TYPE_P4_METER_PROF      0x1dUL
+#define CFA_RESOURCE_TYPE_P4_METER_PROF          0x1fUL
 /* Meter */
-#define CFA_RESOURCE_TYPE_P4_MIRROR          0x1eUL
+#define CFA_RESOURCE_TYPE_P4_MIRROR              0x20UL
 /* Source Property TCAM */
-#define CFA_RESOURCE_TYPE_P4_SP_TCAM         0x1fUL
+#define CFA_RESOURCE_TYPE_P4_SP_TCAM             0x21UL
 /* Table Scope */
-#define CFA_RESOURCE_TYPE_P4_TBL_SCOPE       0x20UL
-#define CFA_RESOURCE_TYPE_P4_LAST           CFA_RESOURCE_TYPE_P4_TBL_SCOPE
+#define CFA_RESOURCE_TYPE_P4_TBL_SCOPE           0x22UL
+#define CFA_RESOURCE_TYPE_P4_LAST               CFA_RESOURCE_TYPE_P4_TBL_SCOPE
 
 
 #endif /* _CFA_RESOURCE_TYPES_H_ */
diff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c
index 219839272..2cc43b40f 100644
--- a/drivers/net/bnxt/tf_core/tf_identifier.c
+++ b/drivers/net/bnxt/tf_core/tf_identifier.c
@@ -59,7 +59,8 @@  tf_ident_bind(struct tf *tfp,
 
 	init = 1;
 
-	printf("Identifier - initialized\n");
+	TFP_DRV_LOG(INFO,
+		    "Identifier - initialized\n");
 
 	return 0;
 }
diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c
index 7fffb6baf..659065de3 100644
--- a/drivers/net/bnxt/tf_core/tf_msg.c
+++ b/drivers/net/bnxt/tf_core/tf_msg.c
@@ -18,6 +18,9 @@ 
 #include "hwrm_tf.h"
 #include "tf_em.h"
 
+/* Logging defines */
+#define TF_RM_MSG_DEBUG  0
+
 /**
  * This is the MAX data we can transport across regular HWRM
  */
@@ -215,7 +218,7 @@  tf_msg_session_resc_qcaps(struct tf *tfp,
 
 	rc = tfp_send_msg_direct(tfp, &parms);
 	if (rc)
-		return rc;
+		goto cleanup;
 
 	/* Process the response
 	 * Should always get expected number of entries
@@ -225,31 +228,39 @@  tf_msg_session_resc_qcaps(struct tf *tfp,
 			    "%s: QCAPS message size error, rc:%s\n",
 			    tf_dir_2_str(dir),
 			    strerror(-EINVAL));
-		return -EINVAL;
+		rc = -EINVAL;
+		goto cleanup;
 	}
 
+#if (TF_RM_MSG_DEBUG == 1)
 	printf("size: %d\n", tfp_le_to_cpu_32(resp.size));
+#endif /* (TF_RM_MSG_DEBUG == 1) */
 
 	/* Post process the response */
 	data = (struct tf_rm_resc_req_entry *)qcaps_buf.va_addr;
 
+#if (TF_RM_MSG_DEBUG == 1)
 	printf("\nQCAPS\n");
+#endif /* (TF_RM_MSG_DEBUG == 1) */
 	for (i = 0; i < size; i++) {
 		query[i].type = tfp_le_to_cpu_32(data[i].type);
 		query[i].min = tfp_le_to_cpu_16(data[i].min);
 		query[i].max = tfp_le_to_cpu_16(data[i].max);
 
+#if (TF_RM_MSG_DEBUG == 1)
 		printf("type: %d(0x%x) %d %d\n",
 		       query[i].type,
 		       query[i].type,
 		       query[i].min,
 		       query[i].max);
+#endif /* (TF_RM_MSG_DEBUG == 1) */
 
 	}
 
 	*resv_strategy = resp.flags &
 	      HWRM_TF_SESSION_RESC_QCAPS_OUTPUT_FLAGS_SESS_RESV_STRATEGY_MASK;
 
+cleanup:
 	tf_msg_free_dma_buf(&qcaps_buf);
 
 	return rc;
@@ -293,8 +304,10 @@  tf_msg_session_resc_alloc(struct tf *tfp,
 
 	dma_size = size * sizeof(struct tf_rm_resc_entry);
 	rc = tf_msg_alloc_dma_buf(&resv_buf, dma_size);
-	if (rc)
+	if (rc) {
+		tf_msg_free_dma_buf(&req_buf);
 		return rc;
+	}
 
 	/* Populate the request */
 	req.fw_session_id = tfp_cpu_to_le_32(fw_session_id);
@@ -320,7 +333,7 @@  tf_msg_session_resc_alloc(struct tf *tfp,
 
 	rc = tfp_send_msg_direct(tfp, &parms);
 	if (rc)
-		return rc;
+		goto cleanup;
 
 	/* Process the response
 	 * Should always get expected number of entries
@@ -330,11 +343,14 @@  tf_msg_session_resc_alloc(struct tf *tfp,
 			    "%s: Alloc message size error, rc:%s\n",
 			    tf_dir_2_str(dir),
 			    strerror(-EINVAL));
-		return -EINVAL;
+		rc = -EINVAL;
+		goto cleanup;
 	}
 
+#if (TF_RM_MSG_DEBUG == 1)
 	printf("\nRESV\n");
 	printf("size: %d\n", tfp_le_to_cpu_32(resp.size));
+#endif /* (TF_RM_MSG_DEBUG == 1) */
 
 	/* Post process the response */
 	resv_data = (struct tf_rm_resc_entry *)resv_buf.va_addr;
@@ -343,14 +359,17 @@  tf_msg_session_resc_alloc(struct tf *tfp,
 		resv[i].start = tfp_le_to_cpu_16(resv_data[i].start);
 		resv[i].stride = tfp_le_to_cpu_16(resv_data[i].stride);
 
+#if (TF_RM_MSG_DEBUG == 1)
 		printf("%d type: %d(0x%x) %d %d\n",
 		       i,
 		       resv[i].type,
 		       resv[i].type,
 		       resv[i].start,
 		       resv[i].stride);
+#endif /* (TF_RM_MSG_DEBUG == 1) */
 	}
 
+cleanup:
 	tf_msg_free_dma_buf(&req_buf);
 	tf_msg_free_dma_buf(&resv_buf);
 
@@ -412,8 +431,6 @@  tf_msg_session_resc_flush(struct tf *tfp,
 	parms.mailbox = TF_KONG_MB;
 
 	rc = tfp_send_msg_direct(tfp, &parms);
-	if (rc)
-		return rc;
 
 	tf_msg_free_dma_buf(&resv_buf);
 
@@ -434,7 +451,7 @@  tf_msg_insert_em_internal_entry(struct tf *tfp,
 	struct tf_session *tfs = (struct tf_session *)(tfp->session->core_data);
 	struct tf_em_64b_entry *em_result =
 		(struct tf_em_64b_entry *)em_parms->em_record;
-	uint32_t flags;
+	uint16_t flags;
 
 	req.fw_session_id =
 		tfp_cpu_to_le_32(tfs->session_id.internal.fw_session_id);
@@ -480,7 +497,7 @@  tf_msg_delete_em_entry(struct tf *tfp,
 	struct tfp_send_msg_parms parms = { 0 };
 	struct hwrm_tf_em_delete_input req = { 0 };
 	struct hwrm_tf_em_delete_output resp = { 0 };
-	uint32_t flags;
+	uint16_t flags;
 	struct tf_session *tfs =
 		(struct tf_session *)(tfp->session->core_data);
 
@@ -726,8 +743,6 @@  tf_msg_tcam_entry_set(struct tf *tfp,
 
 	rc = tfp_send_msg_direct(tfp,
 				 &mparms);
-	if (rc)
-		goto cleanup;
 
 cleanup:
 	tf_msg_free_dma_buf(&buf);
diff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c
index e7af9eb84..30313e2ea 100644
--- a/drivers/net/bnxt/tf_core/tf_rm.c
+++ b/drivers/net/bnxt/tf_core/tf_rm.c
@@ -17,6 +17,9 @@ 
 #include "tfp.h"
 #include "tf_msg.h"
 
+/* Logging defines */
+#define TF_RM_DEBUG  0
+
 /**
  * Generic RM Element data type that an RM DB is build upon.
  */
@@ -120,16 +123,11 @@  tf_rm_count_hcapi_reservations(enum tf_dir dir,
 		    cfg[i].cfg_type == TF_RM_ELEM_CFG_NULL &&
 		    reservations[i] > 0) {
 			TFP_DRV_LOG(ERR,
-				"%s, %s, %s allocation not supported\n",
-				tf_device_module_type_2_str(type),
-				tf_dir_2_str(dir),
-				tf_device_module_type_subtype_2_str(type, i));
-			printf("%s, %s, %s allocation of %d not supported\n",
+				"%s, %s, %s allocation of %d not supported\n",
 				tf_device_module_type_2_str(type),
 				tf_dir_2_str(dir),
-			       tf_device_module_type_subtype_2_str(type, i),
-			       reservations[i]);
-
+				tf_device_module_type_subtype_2_str(type, i),
+				reservations[i]);
 		}
 	}
 
@@ -549,11 +547,6 @@  tf_rm_create_db(struct tf *tfp,
 			db[i].alloc.entry.start = resv[j].start;
 			db[i].alloc.entry.stride = resv[j].stride;
 
-			printf("Entry:%d Start:%d Stride:%d\n",
-			       i,
-			       resv[j].start,
-			       resv[j].stride);
-
 			/* Only allocate BA pool if so requested */
 			if (parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) {
 				/* Create pool */
@@ -603,10 +596,12 @@  tf_rm_create_db(struct tf *tfp,
 	rm_db->type = parms->type;
 	*parms->rm_db = (void *)rm_db;
 
+#if (TF_RM_DEBUG == 1)
 	printf("%s: type:%d num_entries:%d\n",
 	       tf_dir_2_str(parms->dir),
 	       parms->type,
 	       i);
+#endif /* (TF_RM_DEBUG == 1) */
 
 	tfp_free((void *)req);
 	tfp_free((void *)resv);
diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c
index 3a3277329..7d4daaf2d 100644
--- a/drivers/net/bnxt/tf_core/tf_tbl.c
+++ b/drivers/net/bnxt/tf_core/tf_tbl.c
@@ -74,7 +74,8 @@  tf_tbl_bind(struct tf *tfp,
 
 	init = 1;
 
-	printf("Table Type - initialized\n");
+	TFP_DRV_LOG(INFO,
+		    "Table Type - initialized\n");
 
 	return 0;
 }
diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c
index b1092cd9d..1c48b5363 100644
--- a/drivers/net/bnxt/tf_core/tf_tcam.c
+++ b/drivers/net/bnxt/tf_core/tf_tcam.c
@@ -81,7 +81,8 @@  tf_tcam_bind(struct tf *tfp,
 
 	init = 1;
 
-	printf("TCAM - initialized\n");
+	TFP_DRV_LOG(INFO,
+		    "TCAM - initialized\n");
 
 	return 0;
 }
@@ -275,6 +276,31 @@  tf_tcam_free(struct tf *tfp,
 		return rc;
 	}
 
+	if (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM) {
+		int i;
+
+		for (i = -1; i < 3; i += 3) {
+			aparms.index += i;
+			rc = tf_rm_is_allocated(&aparms);
+			if (rc)
+				return rc;
+
+			if (allocated == TF_RM_ALLOCATED_ENTRY_IN_USE) {
+				/* Free requested element */
+				fparms.index = aparms.index;
+				rc = tf_rm_free(&fparms);
+				if (rc) {
+					TFP_DRV_LOG(ERR,
+						    "%s: Free failed, type:%d, index:%d\n",
+						    tf_dir_2_str(parms->dir),
+						    parms->type,
+						    fparms.index);
+					return rc;
+				}
+			}
+		}
+	}
+
 	/* Convert TF type to HCAPI RM type */
 	hparms.rm_db = tcam_db[parms->dir];
 	hparms.db_index = parms->type;