From patchwork Wed Jun 24 07:53:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guinan Sun X-Patchwork-Id: 72075 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 47A32A0350; Wed, 24 Jun 2020 10:06:12 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B968A1D954; Wed, 24 Jun 2020 10:02:12 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 056B81D94A for ; Wed, 24 Jun 2020 10:02:09 +0200 (CEST) IronPort-SDR: d9sQP2Y4qRxIAWVsFd+fGpD+TXyV8ieNe4AacTXDy+1+9jW9Jcup4hdpGSvtNfvHuMnKUuft1Y k6G76Pfl9wwQ== X-IronPort-AV: E=McAfee;i="6000,8403,9661"; a="143472929" X-IronPort-AV: E=Sophos;i="5.75,274,1589266800"; d="scan'208";a="143472929" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2020 01:02:09 -0700 IronPort-SDR: gtRBJzT7Mu9w5xOO6yirtR1YujLPUkiQY1YxuaKJTbLBXmWvZ72SoH3bnRc4GxLmYhczeMZOZh /069tXeQJn6w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,274,1589266800"; d="scan'208";a="385102881" Received: from intel.sh.intel.com ([10.239.255.48]) by fmsmga001.fm.intel.com with ESMTP; 24 Jun 2020 01:02:07 -0700 From: Guinan Sun To: dev@dpdk.org Cc: Jeff Guo , Wenzhuo Lu , Guinan Sun Date: Wed, 24 Jun 2020 07:53:16 +0000 Message-Id: <20200624075337.6768-22-guinanx.sun@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200624075337.6768-1-guinanx.sun@intel.com> References: <20200622064634.70941-1-guinanx.sun@intel.com> <20200624075337.6768-1-guinanx.sun@intel.com> Subject: [dpdk-dev] [PATCH v2 21/42] net/e1000/base: move definitions from 82575 to defines file X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Move definitions from 82575 to e1000_defines.h file. The patch is for refactoring the codes. Signed-off-by: Guinan Sun --- drivers/net/e1000/base/e1000_82575.h | 8 -------- drivers/net/e1000/base/e1000_defines.h | 11 +++++++++++ 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h index a588f7c1e..c5e5f8221 100644 --- a/drivers/net/e1000/base/e1000_82575.h +++ b/drivers/net/e1000/base/e1000_82575.h @@ -151,14 +151,12 @@ struct e1000_adv_context_desc { /* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */ #define E1000_IMIR_PORT_IM_EN 0x00010000 /* TCP port enable */ #define E1000_IMIR_PORT_BP 0x00020000 /* TCP port check bypass */ -#define E1000_IMIREXT_SIZE_BP 0x00001000 /* Packet size bypass */ #define E1000_IMIREXT_CTRL_URG 0x00002000 /* Check URG bit in header */ #define E1000_IMIREXT_CTRL_ACK 0x00004000 /* Check ACK bit in header */ #define E1000_IMIREXT_CTRL_PSH 0x00008000 /* Check PSH bit in header */ #define E1000_IMIREXT_CTRL_RST 0x00010000 /* Check RST bit in header */ #define E1000_IMIREXT_CTRL_SYN 0x00020000 /* Check SYN bit in header */ #define E1000_IMIREXT_CTRL_FIN 0x00040000 /* Check FIN bit in header */ -#define E1000_IMIREXT_CTRL_BP 0x00080000 /* Bypass check of ctrl bits */ #define E1000_RXDADV_RSSTYPE_MASK 0x0000000F #define E1000_RXDADV_RSSTYPE_SHIFT 12 @@ -167,7 +165,6 @@ struct e1000_adv_context_desc { #define E1000_RXDADV_SPLITHEADER_EN 0x00001000 #define E1000_RXDADV_SPH 0x8000 #define E1000_RXDADV_STAT_TS 0x10000 /* Pkt was time stamped */ -#define E1000_RXDADV_STAT_TSIP 0x08000 /* timestamp in packet */ #define E1000_RXDADV_ERR_HBO 0x00800000 /* RSS Hash results */ @@ -299,7 +296,6 @@ struct e1000_adv_context_desc { /* ETQF register bit definitions */ #define E1000_ETQF_FILTER_ENABLE (1 << 26) #define E1000_ETQF_IMM_INT (1 << 29) -#define E1000_ETQF_1588 (1 << 30) /* * ETQF filter list: one static filter per filter consumer. This is * to avoid filter collisions later. Add new filters @@ -310,10 +306,6 @@ struct e1000_adv_context_desc { */ #define E1000_ETQF_FILTER_EAPOL 0 -#define E1000_FTQF_VF_BP 0x00008000 -#define E1000_FTQF_1588_TIME_STAMP 0x08000000 -#define E1000_FTQF_MASK 0xF0000000 -#define E1000_FTQF_MASK_PROTO_BP 0x10000000 #define E1000_FTQF_MASK_SOURCE_ADDR_BP 0x20000000 #define E1000_FTQF_MASK_DEST_ADDR_BP 0x40000000 #define E1000_FTQF_MASK_SOURCE_PORT_BP 0x80000000 diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h index 111e408be..12747918c 100644 --- a/drivers/net/e1000/base/e1000_defines.h +++ b/drivers/net/e1000/base/e1000_defines.h @@ -770,6 +770,17 @@ #define E1000_TIMINCA_INCPERIOD_SHIFT 24 #define E1000_TIMINCA_INCVALUE_MASK 0x00FFFFFF +/* ETQF register bit definitions */ +#define E1000_ETQF_1588 (1 << 30) +#define E1000_FTQF_VF_BP 0x00008000 +#define E1000_FTQF_1588_TIME_STAMP 0x08000000 +#define E1000_FTQF_MASK 0xF0000000 +#define E1000_FTQF_MASK_PROTO_BP 0x10000000 +/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */ +#define E1000_IMIREXT_CTRL_BP 0x00080000 /* Bypass check of ctrl bits */ +#define E1000_IMIREXT_SIZE_BP 0x00001000 /* Packet size bypass */ + +#define E1000_RXDADV_STAT_TSIP 0x08000 /* timestamp in packet */ #define E1000_TSICR_TXTS 0x00000002 #define E1000_TSIM_TXTS 0x00000002 /* TUPLE Filtering Configuration */