[v2,2/2] net/e1000: fix defects of macro in VF
Checks
Commit Message
The defects in the macros UPDATE_VF_STAT and UPDATE_VF_STAT_36BIT exist.
If latest is less than last, we will get wrong result.
The patch fixes the defect.
Fixes: d15fcf76c8b7 ("e1000: move to drivers/net/")
Cc: stable@dpdk.org
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
v2 changes:
* Aligned line-continuation character "\".
---
drivers/net/e1000/igb_ethdev.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
Comments
Hi, guinan
On 05/08, Guinan Sun wrote:
>The defects in the macros UPDATE_VF_STAT and UPDATE_VF_STAT_36BIT exist.
>If latest is less than last, we will get wrong result.
>The patch fixes the defect.
There was similar patch before, https://patches.dpdk.org/patch/65131/, if I
understand it correctly, you are trying to solve the rollover issue, right?
Could you find the Ferruh's comment and check if this is a real issue?
>
>Fixes: d15fcf76c8b7 ("e1000: move to drivers/net/")
This fix commit isn't correct.
Thanks,
Xiaolong
>Cc: stable@dpdk.org
>
>Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
>---
>v2 changes:
>* Aligned line-continuation character "\".
>---
> drivers/net/e1000/igb_ethdev.c | 18 +++++++++++++-----
> 1 file changed, 13 insertions(+), 5 deletions(-)
>
>diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
>index 520fba8fa..4cd4e55c0 100644
>--- a/drivers/net/e1000/igb_ethdev.c
>+++ b/drivers/net/e1000/igb_ethdev.c
>@@ -47,6 +47,8 @@
> #define IGB_4_BIT_MASK RTE_LEN2MASK(IGB_4_BIT_WIDTH, uint8_t)
> #define IGB_8_BIT_WIDTH CHAR_BIT
> #define IGB_8_BIT_MASK UINT8_MAX
>+#define IGB_32_BIT_WIDTH (CHAR_BIT * 4)
>+#define IGB_32_BIT_MASK RTE_LEN2MASK(IGB_32_BIT_WIDTH, uint32_t)
>
> /* Additional timesync values. */
> #define E1000_CYCLECOUNTER_MASK 0xffffffffffffffffULL
>@@ -261,11 +263,17 @@ static int igb_filter_restore(struct rte_eth_dev *dev);
> /*
> * Define VF Stats MACRO for Non "cleared on read" register
> */
>-#define UPDATE_VF_STAT(reg, last, cur) \
>-{ \
>- u32 latest = E1000_READ_REG(hw, reg); \
>- cur += (latest - last) & UINT_MAX; \
>- last = latest; \
>+#define UPDATE_VF_STAT(reg, last, cur) \
>+{ \
>+ uint64_t latest = E1000_READ_REG(hw, reg); \
>+ uint64_t stat = 0; \
>+ if (latest >= last) \
>+ stat = latest - last; \
>+ else \
>+ stat = (uint64_t)((latest + \
>+ ((uint64_t)1 << IGB_32_BIT_WIDTH)) - last);\
>+ cur += stat & IGB_32_BIT_MASK; \
>+ last = latest; \
> }
>
> #define IGB_FC_PAUSE_TIME 0x0680
>--
>2.17.1
>
Hi, xiaolong
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Ye Xiaolong
> Sent: Monday, May 18, 2020 9:25 AM
> To: Sun, GuinanX <guinanx.sun@intel.com>
> Cc: dev@dpdk.org; stable@dpdk.org
> Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH v2 2/2] net/e1000: fix defects of
> macro in VF
>
> Hi, guinan
>
> On 05/08, Guinan Sun wrote:
> >The defects in the macros UPDATE_VF_STAT and UPDATE_VF_STAT_36BIT
> exist.
> >If latest is less than last, we will get wrong result.
> >The patch fixes the defect.
>
> There was similar patch before, https://patches.dpdk.org/patch/65131/, if I
> understand it correctly, you are trying to solve the rollover issue, right?
> Could you find the Ferruh's comment and check if this is a real issue?
this issue has not been fixed by now, we need this patch to fix it.
If (latest < last), there will be issue, is that right?
>
> >
> >Fixes: d15fcf76c8b7 ("e1000: move to drivers/net/")
>
> This fix commit isn't correct.
>
> Thanks,
> Xiaolong
>
> >Cc: stable@dpdk.org
>
>
>
> >
> >Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
> >---
> >v2 changes:
> >* Aligned line-continuation character "\".
> >---
> > drivers/net/e1000/igb_ethdev.c | 18 +++++++++++++-----
> > 1 file changed, 13 insertions(+), 5 deletions(-)
> >
> >diff --git a/drivers/net/e1000/igb_ethdev.c
> >b/drivers/net/e1000/igb_ethdev.c index 520fba8fa..4cd4e55c0 100644
> >--- a/drivers/net/e1000/igb_ethdev.c
> >+++ b/drivers/net/e1000/igb_ethdev.c
> >@@ -47,6 +47,8 @@
> > #define IGB_4_BIT_MASK RTE_LEN2MASK(IGB_4_BIT_WIDTH, uint8_t)
> > #define IGB_8_BIT_WIDTH CHAR_BIT
> > #define IGB_8_BIT_MASK UINT8_MAX
> >+#define IGB_32_BIT_WIDTH (CHAR_BIT * 4) #define IGB_32_BIT_MASK
> >+RTE_LEN2MASK(IGB_32_BIT_WIDTH, uint32_t)
> >
> > /* Additional timesync values. */
> > #define E1000_CYCLECOUNTER_MASK 0xffffffffffffffffULL
> >@@ -261,11 +263,17 @@ static int igb_filter_restore(struct rte_eth_dev
> >*dev);
> > /*
> > * Define VF Stats MACRO for Non "cleared on read" register
> > */
> >-#define UPDATE_VF_STAT(reg, last, cur) \
> >-{ \
> >- u32 latest = E1000_READ_REG(hw, reg); \
> >- cur += (latest - last) & UINT_MAX; \
> >- last = latest; \
> >+#define UPDATE_VF_STAT(reg, last, cur)
> \
> >+{
> \
> >+ uint64_t latest = E1000_READ_REG(hw, reg); \
> >+ uint64_t stat = 0; \
> >+ if (latest >= last) \
> >+ stat = latest - last; \
> >+ else \
> >+ stat = (uint64_t)((latest + \
> >+ ((uint64_t)1 << IGB_32_BIT_WIDTH)) - last);\
> >+ cur += stat & IGB_32_BIT_MASK; \
> >+ last = latest; \
> > }
> >
> > #define IGB_FC_PAUSE_TIME 0x0680
> >--
> >2.17.1
> >
Hi, jiaqi
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Guinan Sun
> Sent: Friday, May 8, 2020 12:46 PM
> To: dev@dpdk.org
> Cc: Sun, GuinanX <guinanx.sun@intel.com>; stable@dpdk.org
> Subject: [dpdk-dev] [PATCH v2 2/2] net/e1000: fix defects of macro in VF
>
> The defects in the macros UPDATE_VF_STAT and UPDATE_VF_STAT_36BIT
> exist.
> If latest is less than last, we will get wrong result.
> The patch fixes the defect.
>
> Fixes: d15fcf76c8b7 ("e1000: move to drivers/net/")
> Cc: stable@dpdk.org
>
> Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
> ---
> v2 changes:
> * Aligned line-continuation character "\".
> ---
> drivers/net/e1000/igb_ethdev.c | 18 +++++++++++++-----
> 1 file changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
> index 520fba8fa..4cd4e55c0 100644
> --- a/drivers/net/e1000/igb_ethdev.c
> +++ b/drivers/net/e1000/igb_ethdev.c
> @@ -47,6 +47,8 @@
> #define IGB_4_BIT_MASK RTE_LEN2MASK(IGB_4_BIT_WIDTH, uint8_t)
> #define IGB_8_BIT_WIDTH CHAR_BIT
> #define IGB_8_BIT_MASK UINT8_MAX
> +#define IGB_32_BIT_WIDTH (CHAR_BIT * 4) #define IGB_32_BIT_MASK
> +RTE_LEN2MASK(IGB_32_BIT_WIDTH, uint32_t)
>
> /* Additional timesync values. */
> #define E1000_CYCLECOUNTER_MASK 0xffffffffffffffffULL
> @@ -261,11 +263,17 @@ static int igb_filter_restore(struct rte_eth_dev
> *dev);
> /*
> * Define VF Stats MACRO for Non "cleared on read" register
> */
> -#define UPDATE_VF_STAT(reg, last, cur) \
> -{ \
> - u32 latest = E1000_READ_REG(hw, reg); \
> - cur += (latest - last) & UINT_MAX; \
> - last = latest; \
> +#define UPDATE_VF_STAT(reg, last, cur) \
> +{
> \
> + uint64_t latest = E1000_READ_REG(hw, reg); \
> + uint64_t stat = 0; \
Why do use 64 bit for register read？
Igb register only 32 bit width?
> + if (latest >= last) \
> + stat = latest - last; \
> + else \
> + stat = (uint64_t)((latest + \
> + ((uint64_t)1 << IGB_32_BIT_WIDTH)) - last);\
> + cur += stat & IGB_32_BIT_MASK; \
> + last = latest; \
> }
>
> #define IGB_FC_PAUSE_TIME 0x0680
> --
> 2.17.1
Hi, wei
On 05/18, Zhao1, Wei wrote:
>Hi, xiaolong
>
>> -----Original Message-----
>> From: dev <dev-bounces@dpdk.org> On Behalf Of Ye Xiaolong
>> Sent: Monday, May 18, 2020 9:25 AM
>> To: Sun, GuinanX <guinanx.sun@intel.com>
>> Cc: dev@dpdk.org; stable@dpdk.org
>> Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH v2 2/2] net/e1000: fix defects of
>> macro in VF
>>
>> Hi, guinan
>>
>> On 05/08, Guinan Sun wrote:
>> >The defects in the macros UPDATE_VF_STAT and UPDATE_VF_STAT_36BIT
>> exist.
>> >If latest is less than last, we will get wrong result.
>> >The patch fixes the defect.
>>
>> There was similar patch before, https://patches.dpdk.org/patch/65131/, if I
>> understand it correctly, you are trying to solve the rollover issue, right?
>> Could you find the Ferruh's comment and check if this is a real issue?
>
>this issue has not been fixed by now, we need this patch to fix it.
>If (latest < last), there will be issue, is that right?
Actually the rollover case has been covered by original code.
Thanks,
Xiaolong
>
>
>>
>> >
>> >Fixes: d15fcf76c8b7 ("e1000: move to drivers/net/")
>>
>> This fix commit isn't correct.
>>
>> Thanks,
>> Xiaolong
>>
>> >Cc: stable@dpdk.org
>>
>>
>>
>> >
>> >Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
>> >---
>> >v2 changes:
>> >* Aligned line-continuation character "\".
>> >---
>> > drivers/net/e1000/igb_ethdev.c | 18 +++++++++++++-----
>> > 1 file changed, 13 insertions(+), 5 deletions(-)
>> >
>> >diff --git a/drivers/net/e1000/igb_ethdev.c
>> >b/drivers/net/e1000/igb_ethdev.c index 520fba8fa..4cd4e55c0 100644
>> >--- a/drivers/net/e1000/igb_ethdev.c
>> >+++ b/drivers/net/e1000/igb_ethdev.c
>> >@@ -47,6 +47,8 @@
>> > #define IGB_4_BIT_MASK RTE_LEN2MASK(IGB_4_BIT_WIDTH, uint8_t)
>> > #define IGB_8_BIT_WIDTH CHAR_BIT
>> > #define IGB_8_BIT_MASK UINT8_MAX
>> >+#define IGB_32_BIT_WIDTH (CHAR_BIT * 4) #define IGB_32_BIT_MASK
>> >+RTE_LEN2MASK(IGB_32_BIT_WIDTH, uint32_t)
>> >
>> > /* Additional timesync values. */
>> > #define E1000_CYCLECOUNTER_MASK 0xffffffffffffffffULL
>> >@@ -261,11 +263,17 @@ static int igb_filter_restore(struct rte_eth_dev
>> >*dev);
>> > /*
>> > * Define VF Stats MACRO for Non "cleared on read" register
>> > */
>> >-#define UPDATE_VF_STAT(reg, last, cur) \
>> >-{ \
>> >-u32 latest = E1000_READ_REG(hw, reg); \
>> >-cur += (latest - last) & UINT_MAX; \
>> >-last = latest; \
>> >+#define UPDATE_VF_STAT(reg, last, cur)
>> \
>> >+{
>> \
>> >+uint64_t latest = E1000_READ_REG(hw, reg); \
>> >+uint64_t stat = 0; \
>> >+if (latest >= last) \
>> >+stat = latest - last; \
>> >+else \
>> >+stat = (uint64_t)((latest + \
>> >+((uint64_t)1 << IGB_32_BIT_WIDTH)) - last);\
>> >+cur += stat & IGB_32_BIT_MASK; \
>> >+last = latest; \
>> > }
>> >
>> > #define IGB_FC_PAUSE_TIME 0x0680
>> >--
>> >2.17.1
>> >
> -----Original Message-----
> From: Ye, Xiaolong <xiaolong.ye@intel.com>
> Sent: Tuesday, May 19, 2020 7:39 AM
> To: Zhao1, Wei <wei.zhao1@intel.com>
> Cc: Sun, GuinanX <guinanx.sun@intel.com>; dev@dpdk.org; stable@dpdk.org;
> Min, JiaqiX <jiaqix.min@intel.com>; Yigit, Ferruh <ferruh.yigit@intel.com>
> Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH v2 2/2] net/e1000: fix defects of
> macro in VF
>
> Hi, wei
>
> On 05/18, Zhao1, Wei wrote:
> >Hi, xiaolong
> >
> >> -----Original Message-----
> >> From: dev <dev-bounces@dpdk.org> On Behalf Of Ye Xiaolong
> >> Sent: Monday, May 18, 2020 9:25 AM
> >> To: Sun, GuinanX <guinanx.sun@intel.com>
> >> Cc: dev@dpdk.org; stable@dpdk.org
> >> Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH v2 2/2] net/e1000: fix
> >> defects of macro in VF
> >>
> >> Hi, guinan
> >>
> >> On 05/08, Guinan Sun wrote:
> >> >The defects in the macros UPDATE_VF_STAT and UPDATE_VF_STAT_36BIT
> >> exist.
> >> >If latest is less than last, we will get wrong result.
> >> >The patch fixes the defect.
> >>
> >> There was similar patch before,
> >> https://patches.dpdk.org/patch/65131/, if I understand it correctly, you are
> trying to solve the rollover issue, right?
> >> Could you find the Ferruh's comment and check if this is a real issue?
> >
> >this issue has not been fixed by now, we need this patch to fix it.
> >If (latest < last), there will be issue, is that right?
>
> Actually the rollover case has been covered by original code.
Yes, you are right.
>
> Thanks,
> Xiaolong
>
>
> >
> >
> >>
> >> >
> >> >Fixes: d15fcf76c8b7 ("e1000: move to drivers/net/")
> >>
> >> This fix commit isn't correct.
> >>
> >> Thanks,
> >> Xiaolong
> >>
> >> >Cc: stable@dpdk.org
> >>
> >>
> >>
> >> >
> >> >Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
> >> >---
> >> >v2 changes:
> >> >* Aligned line-continuation character "\".
> >> >---
> >> > drivers/net/e1000/igb_ethdev.c | 18 +++++++++++++-----
> >> > 1 file changed, 13 insertions(+), 5 deletions(-)
> >> >
> >> >diff --git a/drivers/net/e1000/igb_ethdev.c
> >> >b/drivers/net/e1000/igb_ethdev.c index 520fba8fa..4cd4e55c0 100644
> >> >--- a/drivers/net/e1000/igb_ethdev.c
> >> >+++ b/drivers/net/e1000/igb_ethdev.c
> >> >@@ -47,6 +47,8 @@
> >> > #define IGB_4_BIT_MASK RTE_LEN2MASK(IGB_4_BIT_WIDTH,
> uint8_t)
> >> > #define IGB_8_BIT_WIDTH CHAR_BIT
> >> > #define IGB_8_BIT_MASK UINT8_MAX
> >> >+#define IGB_32_BIT_WIDTH (CHAR_BIT * 4) #define IGB_32_BIT_MASK
> >> >+RTE_LEN2MASK(IGB_32_BIT_WIDTH, uint32_t)
> >> >
> >> > /* Additional timesync values. */
> >> > #define E1000_CYCLECOUNTER_MASK 0xffffffffffffffffULL
> >> >@@ -261,11 +263,17 @@ static int igb_filter_restore(struct
> >> >rte_eth_dev *dev);
> >> > /*
> >> > * Define VF Stats MACRO for Non "cleared on read" register
> >> > */
> >> >-#define UPDATE_VF_STAT(reg, last, cur) \
> >> >-{ \
> >> >-u32 latest = E1000_READ_REG(hw, reg); \
> >> >-cur += (latest - last) & UINT_MAX; \
> >> >-last = latest; \
> >> >+#define UPDATE_VF_STAT(reg, last, cur)
> >> \
> >> >+{
> >> \
> >> >+uint64_t latest = E1000_READ_REG(hw, reg); \
> >> >+uint64_t stat = 0; \
> >> >+if (latest >= last) \
> >> >+stat = latest - last; \
> >> >+else \
> >> >+stat = (uint64_t)((latest + \
> >> >+((uint64_t)1 << IGB_32_BIT_WIDTH)) - last);\
> >> >+cur += stat & IGB_32_BIT_MASK; \
> >> >+last = latest; \
> >> > }
> >> >
> >> > #define IGB_FC_PAUSE_TIME 0x0680
> >> >--
> >> >2.17.1
> >> >
@@ -47,6 +47,8 @@
#define IGB_4_BIT_MASK RTE_LEN2MASK(IGB_4_BIT_WIDTH, uint8_t)
#define IGB_8_BIT_WIDTH CHAR_BIT
#define IGB_8_BIT_MASK UINT8_MAX
+#define IGB_32_BIT_WIDTH (CHAR_BIT * 4)
+#define IGB_32_BIT_MASK RTE_LEN2MASK(IGB_32_BIT_WIDTH, uint32_t)
/* Additional timesync values. */
#define E1000_CYCLECOUNTER_MASK 0xffffffffffffffffULL
@@ -261,11 +263,17 @@ static int igb_filter_restore(struct rte_eth_dev *dev);
/*
* Define VF Stats MACRO for Non "cleared on read" register
*/
-#define UPDATE_VF_STAT(reg, last, cur) \
-{ \
- u32 latest = E1000_READ_REG(hw, reg); \
- cur += (latest - last) & UINT_MAX; \
- last = latest; \
+#define UPDATE_VF_STAT(reg, last, cur) \
+{ \
+ uint64_t latest = E1000_READ_REG(hw, reg); \
+ uint64_t stat = 0; \
+ if (latest >= last) \
+ stat = latest - last; \
+ else \
+ stat = (uint64_t)((latest + \
+ ((uint64_t)1 << IGB_32_BIT_WIDTH)) - last);\
+ cur += stat & IGB_32_BIT_MASK; \
+ last = latest; \
}
#define IGB_FC_PAUSE_TIME 0x0680