From patchwork Mon Mar 9 09:38:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Marchand X-Patchwork-Id: 66405 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 11640A052E; Mon, 9 Mar 2020 10:39:03 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1EE861C02D; Mon, 9 Mar 2020 10:39:02 +0100 (CET) Received: from us-smtp-delivery-1.mimecast.com (us-smtp-1.mimecast.com [207.211.31.81]) by dpdk.org (Postfix) with ESMTP id 8CAD61C00E for ; Mon, 9 Mar 2020 10:39:00 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1583746740; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=D8wn4bvvhk7lJFUKf/7ryaN6I7dCK99aZBwSs1TNi4w=; b=MReq/kOxPqwMdVjyuQwOK7PVFPdeDMIa9asGVp6jTDcUsdCuM9kOYvOrpPFm0gOUr+3j8n /AEzmX2vglv5DzWDjtxVDlkdjyC6V9nrMZ2ywQSoISIzUIDHV1UVjATlpHrxOFD/PrHV6y qUfDL3RfpuJxTFu9CsvenaJFiSaDaE0= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-345-HqzhriPIOjqKEOaK2QE7OQ-1; Mon, 09 Mar 2020 05:38:58 -0400 X-MC-Unique: HqzhriPIOjqKEOaK2QE7OQ-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 3BCFB107ACC4; Mon, 9 Mar 2020 09:38:57 +0000 (UTC) Received: from dmarchan.remote.csb (ovpn-204-36.brq.redhat.com [10.40.204.36]) by smtp.corp.redhat.com (Postfix) with ESMTP id 94D705C1C3; Mon, 9 Mar 2020 09:38:55 +0000 (UTC) From: David Marchand To: dev@dpdk.org Cc: Jerin Jacob , Gavin Hu , Jan Viktorin Date: Mon, 9 Mar 2020 10:38:44 +0100 Message-Id: <20200309093844.30579-1-david.marchand@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Subject: [dpdk-dev] [PATCH] eal/arm64: remove internal macros X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" No need to export dsb and dmb. EAL memory barriers are the public API. %s/\<\(d.b\)\>(\([^()]*\))$/asm volatile("\1 \2" : : : "memory")/ Signed-off-by: David Marchand Reviewed-by: Gavin Hu Acked-by: Jerin Jacob Reviewed-by: Gavin Hu Acked-by: Jerin Jacob --- .../common/include/arch/arm/rte_atomic_64.h | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h index 859ae129d8..7b7099cdc1 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h @@ -19,20 +19,17 @@ extern "C" { #include #include -#define dsb(opt) asm volatile("dsb " #opt : : : "memory") -#define dmb(opt) asm volatile("dmb " #opt : : : "memory") +#define rte_mb() asm volatile("dsb sy" : : : "memory") -#define rte_mb() dsb(sy) +#define rte_wmb() asm volatile("dsb st" : : : "memory") -#define rte_wmb() dsb(st) +#define rte_rmb() asm volatile("dsb ld" : : : "memory") -#define rte_rmb() dsb(ld) +#define rte_smp_mb() asm volatile("dmb ish" : : : "memory") -#define rte_smp_mb() dmb(ish) +#define rte_smp_wmb() asm volatile("dmb ishst" : : : "memory") -#define rte_smp_wmb() dmb(ishst) - -#define rte_smp_rmb() dmb(ishld) +#define rte_smp_rmb() asm volatile("dmb ishld" : : : "memory") #define rte_io_mb() rte_mb() @@ -40,9 +37,9 @@ extern "C" { #define rte_io_rmb() rte_rmb() -#define rte_cio_wmb() dmb(oshst) +#define rte_cio_wmb() asm volatile("dmb oshst" : : : "memory") -#define rte_cio_rmb() dmb(oshld) +#define rte_cio_rmb() asm volatile("dmb oshld" : : : "memory") /*------------------------ 128 bit atomic operations -------------------------*/