From patchwork Thu Jan 9 03:15:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wei Hu (Xavier)" X-Patchwork-Id: 64320 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 67D33A04F3; Thu, 9 Jan 2020 04:24:44 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 68ABC1DB6D; Thu, 9 Jan 2020 04:23:50 +0100 (CET) Received: from incedge.chinasoftinc.com (unknown [114.113.233.8]) by dpdk.org (Postfix) with ESMTP id A5CBE1DB3E for ; Thu, 9 Jan 2020 04:23:41 +0100 (CET) X-ASG-Debug-ID: 1578539509-0a3dd116d0042b0014-TfluYd Received: from mail.chinasoftinc.com (inccas002.ito.icss [10.168.0.52]) by incedge.chinasoftinc.com with ESMTP id vwGCr2uLrQbXEV8k (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 09 Jan 2020 11:22:50 +0800 (CST) X-Barracuda-Envelope-From: huwei013@chinasoftinc.com X-Barracuda-RBL-Trusted-Forwarder: 10.168.0.52 X-ASG-Whitelist: Client Received: from localhost.localdomain (203.160.91.226) by INCCAS002.ito.icss (10.168.0.60) with Microsoft SMTP Server id 14.3.439.0; Thu, 9 Jan 2020 11:16:13 +0800 From: "Wei Hu (Xavier)" X-Barracuda-RBL-Trusted-Forwarder: 10.168.0.60 To: Date: Thu, 9 Jan 2020 11:15:57 +0800 X-ASG-Orig-Subj: [PATCH 09/11] net/hns3: fix dumping VF register information Message-ID: <20200109031559.63194-10-huwei013@chinasoftinc.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200109031559.63194-1-huwei013@chinasoftinc.com> References: <20200109031559.63194-1-huwei013@chinasoftinc.com> MIME-Version: 1.0 X-Originating-IP: [203.160.91.226] X-Barracuda-Connect: inccas002.ito.icss[10.168.0.52] X-Barracuda-Start-Time: 1578540170 X-Barracuda-Encrypted: ECDHE-RSA-AES256-SHA X-Barracuda-URL: https://spam.chinasoftinc.com:443/cgi-mod/mark.cgi X-Virus-Scanned: by bsmtpd at chinasoftinc.com X-Barracuda-Scan-Msg-Size: 3053 Subject: [dpdk-dev] [PATCH 09/11] net/hns3: fix dumping VF register information X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: "Wei Hu (Xavier)" Currently, when the API interface named rte_eth_dev_get_reg_info is called by upper applications based on VF device, it returns error. We can read registers directly to get ring and interrupt related information in hns3 PF/VF PMD driver. But for some other internal table entries and common configuration information, we can get them only through the command interface between driver and firmware in PF driver, and VF driver has not the related access permission. This patch fixes it by preventing getting these information through the command interface based on VF device in 'get_reg' ops implementation function. Fixes: 936eda25e8da ("net/hns3: support dump register") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng Signed-off-by: Wei Hu (Xavier) --- drivers/net/hns3/hns3_regs.c | 29 ++++++++++++++++++----------- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c index 23405030e..a3f2a51f9 100644 --- a/drivers/net/hns3/hns3_regs.c +++ b/drivers/net/hns3/hns3_regs.c @@ -118,15 +118,9 @@ hns3_get_regs_length(struct hns3_hw *hw, uint32_t *length) struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw); int cmdq_lines, common_lines, ring_lines, tqp_intr_lines; uint32_t regs_num_32_bit, regs_num_64_bit; + uint32_t len; int ret; - ret = hns3_get_regs_num(hw, ®s_num_32_bit, ®s_num_64_bit); - if (ret) { - hns3_err(hw, "Get register number failed, ret = %d.", - ret); - return -ENOTSUP; - } - cmdq_lines = sizeof(cmdq_reg_addrs) / REG_LEN_PER_LINE + 1; if (hns->is_vf) common_lines = @@ -136,11 +130,21 @@ hns3_get_regs_length(struct hns3_hw *hw, uint32_t *length) ring_lines = sizeof(ring_reg_addrs) / REG_LEN_PER_LINE + 1; tqp_intr_lines = sizeof(tqp_intr_reg_addrs) / REG_LEN_PER_LINE + 1; - *length = (cmdq_lines + common_lines + ring_lines * hw->tqps_num + - tqp_intr_lines * hw->num_msi) * REG_LEN_PER_LINE + - regs_num_32_bit * sizeof(uint32_t) + - regs_num_64_bit * sizeof(uint64_t); + len = (cmdq_lines + common_lines + ring_lines * hw->tqps_num + + tqp_intr_lines * hw->num_msi) * REG_LEN_PER_LINE; + if (!hns->is_vf) { + ret = hns3_get_regs_num(hw, ®s_num_32_bit, ®s_num_64_bit); + if (ret) { + hns3_err(hw, "Get register number failed, ret = %d.", + ret); + return -ENOTSUP; + } + len += regs_num_32_bit * sizeof(uint32_t) + + regs_num_64_bit * sizeof(uint64_t); + } + + *length = len; return 0; } @@ -346,6 +350,9 @@ hns3_get_regs(struct rte_eth_dev *eth_dev, struct rte_dev_reg_info *regs) /* fetching per-PF registers values from PF PCIe register space */ hns3_direct_access_regs(hw, data); + if (hns->is_vf) + return 0; + ret = hns3_get_regs_num(hw, ®s_num_32_bit, ®s_num_64_bit); if (ret) { hns3_err(hw, "Get register number failed, ret = %d", ret);