From patchwork Mon Dec 2 07:48:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaolong Ye X-Patchwork-Id: 63448 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7B1D5A04B5; Mon, 2 Dec 2019 09:01:01 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8C26E1BFCC; Mon, 2 Dec 2019 08:58:27 +0100 (CET) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id 56A081BFAE for ; Mon, 2 Dec 2019 08:58:20 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Dec 2019 23:58:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,268,1571727600"; d="scan'208";a="207993439" Received: from dpdk_yexl_af_xdp.sh.intel.com ([10.67.119.186]) by fmsmga008.fm.intel.com with ESMTP; 01 Dec 2019 23:58:18 -0800 From: Xiaolong Ye To: Beilei Xing , Qi Zhang Cc: dev@dpdk.org, Xiaolong Ye , Krzysztof Galazka , Piotr Pietruszewski Date: Mon, 2 Dec 2019 15:48:46 +0800 Message-Id: <20191202074935.97629-21-xiaolong.ye@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191202074935.97629-1-xiaolong.ye@intel.com> References: <20191202074935.97629-1-xiaolong.ye@intel.com> Subject: [dpdk-dev] [PATCH 20/69] net/i40e/base: read LPI status from external PHY X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When external PHY is used, MAC register may not reflect actual state of LPI. Add function reading it directly from PHY or MAC, depending on what is supported by the device. Signed-off-by: Krzysztof Galazka Signed-off-by: Piotr Pietruszewski Reviewed-by: Aleksandr Loktionov Reviewed-by: Kirsher Jeffrey T Signed-off-by: Xiaolong Ye --- drivers/net/i40e/base/i40e_common.c | 66 ++++++++++++++++++++++++++ drivers/net/i40e/base/i40e_prototype.h | 2 + drivers/net/i40e/base/i40e_type.h | 8 ++++ 3 files changed, 76 insertions(+) diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c index da7869431..51ab0c4b8 100644 --- a/drivers/net/i40e/base/i40e_common.c +++ b/drivers/net/i40e/base/i40e_common.c @@ -7046,6 +7046,72 @@ enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on, status = i40e_led_set_reg(hw, led_addr, led_ctl); return status; } + +#ifdef CARLSVILLE_HW +/** + * i40e_get_phy_lpi_status - read LPI status from external PHY or MAC + * @hw: pointer to the hw struct + * @stat: pointer to structure with status of rx and tx lpi + * + * Read LPI state directly from external PHY or MAC, depending on device ID. + */ +#else +/** + * i40e_get_phy_lpi_status - read LPI status from MAC + * @hw: pointer to the hw struct + * @stat: pointer to structure with status of rx and tx lpi + * + * Read LPI state directly from MAC. + */ +#endif +#ifndef EXTERNAL_RELEASE +/* + * Implemented for Broadcom Orca PHY used in Carlsville. + * Refer to FVL DCR335 for details. + */ +#endif +enum i40e_status_code i40e_get_phy_lpi_status(struct i40e_hw *hw, + struct i40e_hw_port_stats *stat) +{ + enum i40e_status_code ret = I40E_SUCCESS; + u32 val; + + stat->rx_lpi_status = 0; + stat->tx_lpi_status = 0; + +#ifdef CARLSVILLE_HW + if (hw->device_id == I40E_DEV_ID_10G_BASE_T_BC) { +#ifndef EXTERNAL_RELEASE + /* For accessing LPI status in Broadcom PHY we're using AQ command only. + * Broadcom PHY supports API >= 1.7, so there is no need for supporting + * direct register access. + */ +#endif + ret = i40e_aq_get_phy_register(hw, + I40E_AQ_PHY_REG_ACCESS_EXTERNAL, + I40E_BCM_PHY_PCS_STATUS1_PAGE, + true, + I40E_BCM_PHY_PCS_STATUS1_REG, + &val, NULL); + + if (ret != I40E_SUCCESS) + return ret; + + stat->rx_lpi_status = !!(val & I40E_BCM_PHY_PCS_STATUS1_RX_LPI); + stat->tx_lpi_status = !!(val & I40E_BCM_PHY_PCS_STATUS1_TX_LPI); + + return ret; + } + +#endif /* CARLSVILLE_HW */ + val = rd32(hw, I40E_PRTPM_EEE_STAT); + stat->rx_lpi_status = (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> + I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; + stat->tx_lpi_status = (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> + I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; + + return ret; +} #endif /* PF_DRIVER */ /** diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h index 406b902b3..4d1b007b8 100644 --- a/drivers/net/i40e/base/i40e_prototype.h +++ b/drivers/net/i40e/base/i40e_prototype.h @@ -74,6 +74,8 @@ enum i40e_status_code i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr, enum i40e_status_code i40e_blink_phy_link_led(struct i40e_hw *hw, u32 time, u32 interval); +enum i40e_status_code i40e_get_phy_lpi_status(struct i40e_hw *hw, + struct i40e_hw_port_stats *stats); /* admin send queue commands */ enum i40e_status_code i40e_aq_get_firmware_version(struct i40e_hw *hw, diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index 322300fa3..23adbbccd 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -2038,4 +2038,12 @@ struct i40e_profile_info { u8 reserved[7]; u8 name[I40E_DDP_NAME_SIZE]; }; + +#ifdef CARLSVILLE_HW +#define I40E_BCM_PHY_PCS_STATUS1_PAGE 0x3 +#define I40E_BCM_PHY_PCS_STATUS1_REG 0x0001 +#define I40E_BCM_PHY_PCS_STATUS1_RX_LPI BIT(8) +#define I40E_BCM_PHY_PCS_STATUS1_TX_LPI BIT(9) +#endif + #endif /* _I40E_TYPE_H_ */