From patchwork Thu Sep 26 10:05:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 59851 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 025A01BFA2; Thu, 26 Sep 2019 12:07:42 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 271A41BF77 for ; Thu, 26 Sep 2019 12:07:39 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x8QA72W1002599; Thu, 26 Sep 2019 03:07:38 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=NvPzi574gtm0MA8pazJVapiR/AmCQZySGCZqBYg0lcQ=; b=iEX2yVgEEVmZSRP1qRFSCm3hhPyhvXbg/AtKFsJf8EGoOrKEL20v5A4rAj97tbTNT0yn opd0YRK89ZUIfF604kjYYfCjsmM910VuM9uXoRqT0IDlSlGD8kXCKHMF0zNBNf1T8YEe bpElkfuy9JzYui6C08BhINoTHDIEOv8q1616p/jCeSnVIB5xlBatsBSrVZ67SNI+yaqg K/LSuXqjdcoBwQhZlNysR0Fgo5r4myvVhGkzjU9kX0oCFq75HNc49vRwahtif0wxFlyt ghOb02UT5juWJTlxXDdYyQzXZHaKZAHnWcKzxv8GPu4McBdjkhIPH8228hdyGBM73NlI rw== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0a-0016f401.pphosted.com with ESMTP id 2v8ua0002f-5 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 26 Sep 2019 03:07:38 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Thu, 26 Sep 2019 03:06:21 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Thu, 26 Sep 2019 03:06:20 -0700 Received: from BG-LT7430.marvell.com (unknown [10.28.17.15]) by maili.marvell.com (Postfix) with ESMTP id 334423F7041; Thu, 26 Sep 2019 03:06:17 -0700 (PDT) From: To: , , Marko Kovacevic , Ori Kam , Bruce Richardson , Radu Nicolau , "Tomasz Kantecki" CC: , Sunil Kumar Kori Date: Thu, 26 Sep 2019 15:35:52 +0530 Message-ID: <20190926100558.24348-6-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926100558.24348-1-pbhagavatula@marvell.com> References: <20190926100558.24348-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-09-26_04:2019-09-25,2019-09-26 signatures=0 Subject: [dpdk-dev] [PATCH 05/11] examples/l3fwd: add event port and queue setup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Add event device queue and port setup based on event eth Tx adapter capabilities. Signed-off-by: Sunil Kumar Kori --- examples/l3fwd/l3fwd_eventdev.c | 30 ++++- examples/l3fwd/l3fwd_eventdev.h | 16 +++ examples/l3fwd/l3fwd_eventdev_generic.c | 113 +++++++++++++++++- examples/l3fwd/l3fwd_eventdev_internal_port.c | 106 +++++++++++++++- 4 files changed, 261 insertions(+), 4 deletions(-) diff --git a/examples/l3fwd/l3fwd_eventdev.c b/examples/l3fwd/l3fwd_eventdev.c index f07cd4b31..f5ac3ccce 100644 --- a/examples/l3fwd/l3fwd_eventdev.c +++ b/examples/l3fwd/l3fwd_eventdev.c @@ -215,7 +215,6 @@ l3fwd_eventdev_capability_setup(void) l3fwd_eventdev_set_internal_port_ops(&evdev_rsrc->ops); } - static uint32_t l3fwd_eventdev_setup(uint16_t ethdev_count) { @@ -267,6 +266,7 @@ l3fwd_eventdev_setup(uint16_t ethdev_count) num_workers = dev_info.max_event_ports; event_d_conf.nb_event_ports = num_workers; + evdev_rsrc->evp.nb_ports = num_workers; evdev_rsrc->has_burst = !!(dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_BURST_MODE); @@ -278,11 +278,31 @@ l3fwd_eventdev_setup(uint16_t ethdev_count) return event_queue_cfg; } +int +l3fwd_get_free_event_port(struct l3fwd_eventdev_resources *evdev_rsrc) +{ + static int index; + int port_id; + + rte_spinlock_lock(&evdev_rsrc->evp.lock); + if (index >= evdev_rsrc->evp.nb_ports) { + printf("No free event port is available\n"); + return -1; + } + + port_id = evdev_rsrc->evp.event_p_id[index]; + index++; + rte_spinlock_unlock(&evdev_rsrc->evp.lock); + + return port_id; +} + void l3fwd_eventdev_resource_setup(struct rte_eth_conf *port_conf) { struct l3fwd_eventdev_resources *evdev_rsrc = l3fwd_get_eventdev_rsrc(); uint16_t ethdev_count = rte_eth_dev_count_avail(); + uint32_t event_queue_cfg; int32_t ret; /* Parse eventdev command line options */ @@ -300,5 +320,11 @@ l3fwd_eventdev_resource_setup(struct rte_eth_conf *port_conf) l3fwd_eth_dev_port_setup(port_conf); /* Event device configuration */ - l3fwd_eventdev_setup(ethdev_count); + event_queue_cfg = l3fwd_eventdev_setup(ethdev_count); + + /* Event queue configuration */ + evdev_rsrc->ops.event_queue_setup(ethdev_count, event_queue_cfg); + + /* Event port configuration */ + evdev_rsrc->ops.event_port_setup(); } diff --git a/examples/l3fwd/l3fwd_eventdev.h b/examples/l3fwd/l3fwd_eventdev.h index f63f3d4ef..2640d6cec 100644 --- a/examples/l3fwd/l3fwd_eventdev.h +++ b/examples/l3fwd/l3fwd_eventdev.h @@ -29,6 +29,17 @@ typedef void (*event_port_setup_cb)(void); typedef void (*service_setup_cb)(void); typedef int (*event_loop_cb)(void *); +struct l3fwd_eventdev_queues { + uint8_t *event_q_id; + uint8_t nb_queues; +}; + +struct l3fwd_eventdev_ports { + uint8_t *event_p_id; + uint8_t nb_ports; + rte_spinlock_t lock; +}; + struct l3fwd_eventdev_setup_ops { event_queue_setup_cb event_queue_setup; event_port_setup_cb event_port_setup; @@ -38,14 +49,18 @@ struct l3fwd_eventdev_setup_ops { }; struct l3fwd_eventdev_resources { + struct rte_event_port_conf def_p_conf; uint8_t disable_implicit_release; struct l3fwd_eventdev_setup_ops ops; struct rte_mempool * (*pkt_pool)[NB_SOCKETS]; + struct l3fwd_eventdev_queues evq; + struct l3fwd_eventdev_ports evp; uint32_t port_mask; uint8_t per_port_pool; uint8_t event_d_id; uint8_t sync_mode; uint8_t tx_mode_q; + uint8_t deq_depth; uint8_t has_burst; uint8_t enabled; uint8_t nb_args; @@ -76,6 +91,7 @@ l3fwd_get_eventdev_rsrc(void) } void l3fwd_eventdev_resource_setup(struct rte_eth_conf *port_conf); +int l3fwd_get_free_event_port(struct l3fwd_eventdev_resources *eventdev_rsrc); void l3fwd_eventdev_set_generic_ops(struct l3fwd_eventdev_setup_ops *ops); void l3fwd_eventdev_set_internal_port_ops(struct l3fwd_eventdev_setup_ops *ops); diff --git a/examples/l3fwd/l3fwd_eventdev_generic.c b/examples/l3fwd/l3fwd_eventdev_generic.c index 35e655fc0..4aec0e403 100644 --- a/examples/l3fwd/l3fwd_eventdev_generic.c +++ b/examples/l3fwd/l3fwd_eventdev_generic.c @@ -5,8 +5,119 @@ #include "l3fwd.h" #include "l3fwd_eventdev.h" +static void +l3fwd_event_port_setup_generic(void) +{ + struct l3fwd_eventdev_resources *evdev_rsrc = l3fwd_get_eventdev_rsrc(); + uint8_t event_d_id = evdev_rsrc->event_d_id; + struct rte_event_port_conf event_p_conf = { + .dequeue_depth = 32, + .enqueue_depth = 32, + .new_event_threshold = 4096 + }; + struct rte_event_port_conf def_p_conf; + uint8_t event_p_id; + int32_t ret; + + evdev_rsrc->evp.event_p_id = (uint8_t *)malloc(sizeof(uint8_t) * + evdev_rsrc->evp.nb_ports); + if (!evdev_rsrc->evp.event_p_id) + rte_exit(EXIT_FAILURE, " No space is available"); + + memset(&def_p_conf, 0, sizeof(struct rte_event_port_conf)); + rte_event_port_default_conf_get(event_d_id, 0, &def_p_conf); + + if (def_p_conf.new_event_threshold < event_p_conf.new_event_threshold) + event_p_conf.new_event_threshold = + def_p_conf.new_event_threshold; + + if (def_p_conf.dequeue_depth < event_p_conf.dequeue_depth) + event_p_conf.dequeue_depth = def_p_conf.dequeue_depth; + + if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth) + event_p_conf.enqueue_depth = def_p_conf.enqueue_depth; + + event_p_conf.disable_implicit_release = + evdev_rsrc->disable_implicit_release; + evdev_rsrc->deq_depth = def_p_conf.dequeue_depth; + + for (event_p_id = 0; event_p_id < evdev_rsrc->evp.nb_ports; + event_p_id++) { + ret = rte_event_port_setup(event_d_id, event_p_id, + &event_p_conf); + if (ret < 0) { + rte_exit(EXIT_FAILURE, + "Error in configuring event port %d\n", + event_p_id); + } + + ret = rte_event_port_link(event_d_id, event_p_id, + evdev_rsrc->evq.event_q_id, + NULL, + evdev_rsrc->evq.nb_queues - 1); + if (ret != (evdev_rsrc->evq.nb_queues - 1)) { + rte_exit(EXIT_FAILURE, "Error in linking event port %d " + "to event queue", event_p_id); + } + evdev_rsrc->evp.event_p_id[event_p_id] = event_p_id; + } + /* init spinlock */ + rte_spinlock_init(&evdev_rsrc->evp.lock); + + evdev_rsrc->def_p_conf = event_p_conf; +} + +static void +l3fwd_event_queue_setup_generic(uint16_t ethdev_count, + uint32_t event_queue_cfg) +{ + struct l3fwd_eventdev_resources *evdev_rsrc = l3fwd_get_eventdev_rsrc(); + uint8_t event_d_id = evdev_rsrc->event_d_id; + struct rte_event_queue_conf event_q_conf = { + .nb_atomic_flows = 1024, + .nb_atomic_order_sequences = 1024, + .event_queue_cfg = event_queue_cfg, + .priority = RTE_EVENT_DEV_PRIORITY_NORMAL + }; + struct rte_event_queue_conf def_q_conf; + uint8_t event_q_id; + int32_t ret; + + event_q_conf.schedule_type = evdev_rsrc->sync_mode; + evdev_rsrc->evq.nb_queues = ethdev_count + 1; + evdev_rsrc->evq.event_q_id = (uint8_t *)malloc(sizeof(uint8_t) * + evdev_rsrc->evq.nb_queues); + if (!evdev_rsrc->evq.event_q_id) + rte_exit(EXIT_FAILURE, "Memory allocation failure"); + + rte_event_queue_default_conf_get(event_d_id, 0, &def_q_conf); + if (def_q_conf.nb_atomic_flows < event_q_conf.nb_atomic_flows) + event_q_conf.nb_atomic_flows = def_q_conf.nb_atomic_flows; + + for (event_q_id = 0; event_q_id < (evdev_rsrc->evq.nb_queues - 1); + event_q_id++) { + ret = rte_event_queue_setup(event_d_id, event_q_id, + &event_q_conf); + if (ret < 0) { + rte_exit(EXIT_FAILURE, + "Error in configuring event queue"); + } + evdev_rsrc->evq.event_q_id[event_q_id] = event_q_id; + } + + event_q_conf.event_queue_cfg |= RTE_EVENT_QUEUE_CFG_SINGLE_LINK; + event_q_conf.priority = RTE_EVENT_DEV_PRIORITY_HIGHEST, + ret = rte_event_queue_setup(event_d_id, event_q_id, &event_q_conf); + if (ret < 0) { + rte_exit(EXIT_FAILURE, + "Error in configuring event queue for Tx adapter"); + } + evdev_rsrc->evq.event_q_id[event_q_id] = event_q_id; +} + void l3fwd_eventdev_set_generic_ops(struct l3fwd_eventdev_setup_ops *ops) { - RTE_SET_USED(ops); + ops->event_queue_setup = l3fwd_event_queue_setup_generic; + ops->event_port_setup = l3fwd_event_port_setup_generic; } diff --git a/examples/l3fwd/l3fwd_eventdev_internal_port.c b/examples/l3fwd/l3fwd_eventdev_internal_port.c index d40185862..363e37899 100644 --- a/examples/l3fwd/l3fwd_eventdev_internal_port.c +++ b/examples/l3fwd/l3fwd_eventdev_internal_port.c @@ -5,9 +5,113 @@ #include "l3fwd.h" #include "l3fwd_eventdev.h" +static void +l3fwd_event_port_setup_internal_port(void) +{ + struct l3fwd_eventdev_resources *evdev_rsrc = l3fwd_get_eventdev_rsrc(); + uint8_t event_d_id = evdev_rsrc->event_d_id; + struct rte_event_port_conf event_p_conf = { + .dequeue_depth = 32, + .enqueue_depth = 32, + .new_event_threshold = 4096 + }; + struct rte_event_port_conf def_p_conf; + uint8_t event_p_id; + int32_t ret; + + evdev_rsrc->evp.event_p_id = (uint8_t *)malloc(sizeof(uint8_t) * + evdev_rsrc->evp.nb_ports); + if (!evdev_rsrc->evp.event_p_id) + rte_exit(EXIT_FAILURE, + "Failed to allocate memory for Event Ports"); + + rte_event_port_default_conf_get(event_d_id, 0, &def_p_conf); + if (def_p_conf.new_event_threshold < event_p_conf.new_event_threshold) + event_p_conf.new_event_threshold = + def_p_conf.new_event_threshold; + + if (def_p_conf.dequeue_depth < event_p_conf.dequeue_depth) + event_p_conf.dequeue_depth = def_p_conf.dequeue_depth; + + if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth) + event_p_conf.enqueue_depth = def_p_conf.enqueue_depth; + + event_p_conf.disable_implicit_release = + evdev_rsrc->disable_implicit_release; + + for (event_p_id = 0; event_p_id < evdev_rsrc->evp.nb_ports; + event_p_id++) { + ret = rte_event_port_setup(event_d_id, event_p_id, + &event_p_conf); + if (ret < 0) { + rte_exit(EXIT_FAILURE, + "Error in configuring event port %d\n", + event_p_id); + } + + ret = rte_event_port_link(event_d_id, event_p_id, NULL, + NULL, 0); + if (ret < 0) { + rte_exit(EXIT_FAILURE, "Error in linking event port %d " + "to event queue", event_p_id); + } + evdev_rsrc->evp.event_p_id[event_p_id] = event_p_id; + + /* init spinlock */ + rte_spinlock_init(&evdev_rsrc->evp.lock); + } + + evdev_rsrc->def_p_conf = event_p_conf; +} + +static void +l3fwd_event_queue_setup_internal_port(uint16_t ethdev_count, + uint32_t event_queue_cfg) +{ + struct l3fwd_eventdev_resources *evdev_rsrc = l3fwd_get_eventdev_rsrc(); + uint8_t event_d_id = evdev_rsrc->event_d_id; + struct rte_event_queue_conf event_q_conf = { + .nb_atomic_flows = 1024, + .nb_atomic_order_sequences = 1024, + .event_queue_cfg = event_queue_cfg, + .priority = RTE_EVENT_DEV_PRIORITY_NORMAL + }; + struct rte_event_queue_conf def_q_conf; + uint8_t event_q_id = 0; + int32_t ret; + + rte_event_queue_default_conf_get(event_d_id, event_q_id, &def_q_conf); + + if (def_q_conf.nb_atomic_flows < event_q_conf.nb_atomic_flows) + event_q_conf.nb_atomic_flows = def_q_conf.nb_atomic_flows; + + if (def_q_conf.nb_atomic_order_sequences < + event_q_conf.nb_atomic_order_sequences) + event_q_conf.nb_atomic_order_sequences = + def_q_conf.nb_atomic_order_sequences; + + event_q_conf.event_queue_cfg = event_queue_cfg; + event_q_conf.schedule_type = evdev_rsrc->sync_mode; + evdev_rsrc->evq.nb_queues = ethdev_count; + evdev_rsrc->evq.event_q_id = (uint8_t *)malloc(sizeof(uint8_t) * + evdev_rsrc->evq.nb_queues); + if (!evdev_rsrc->evq.event_q_id) + rte_exit(EXIT_FAILURE, "Memory allocation failure"); + + for (event_q_id = 0; event_q_id < ethdev_count; event_q_id++) { + ret = rte_event_queue_setup(event_d_id, event_q_id, + &event_q_conf); + if (ret < 0) { + rte_exit(EXIT_FAILURE, + "Error in configuring event queue"); + } + evdev_rsrc->evq.event_q_id[event_q_id] = event_q_id; + } +} void l3fwd_eventdev_set_internal_port_ops(struct l3fwd_eventdev_setup_ops *ops) { - RTE_SET_USED(ops); + ops->event_queue_setup = l3fwd_event_queue_setup_internal_port; + ops->event_port_setup = l3fwd_event_port_setup_internal_port; }