From patchwork Mon Aug 26 10:51:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 57955 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B3F041C23A; Mon, 26 Aug 2019 12:51:53 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 5837D1C198 for ; Mon, 26 Aug 2019 12:50:13 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Aug 2019 03:50:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,431,1559545200"; d="scan'208";a="182402636" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by orsmga003.jf.intel.com with ESMTP; 26 Aug 2019 03:50:11 -0700 From: Qi Zhang To: wenzhuo.lu@intel.com, qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Vignesh Sridhar , Paul M Stillwell Jr Date: Mon, 26 Aug 2019 18:51:01 +0800 Message-Id: <20190826105105.19121-60-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20190826105105.19121-1-qi.z.zhang@intel.com> References: <20190826105105.19121-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH 59/63] net/ice/base: remove Rx flex descriptor programming X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Removing Rx flex descriptor metadata and flag programming from shared code. As per HAS these registers cannot be written to as they are read only. While non-secure NVMs allow write access to them, secure images will not. The programming for all fields per RxDID is now handled in the comms package. Signed-off-by: Vignesh Sridhar Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_common.c | 195 -------------------------------------- 1 file changed, 195 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index d2f903329..11e902ea1 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -11,35 +11,6 @@ #define ICE_PF_RESET_WAIT_COUNT 200 -#define ICE_PROG_FLEX_ENTRY(hw, rxdid, mdid, idx) \ - wr32((hw), GLFLXP_RXDID_FLX_WRD_##idx(rxdid), \ - ((ICE_RX_OPC_MDID << \ - GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_S) & \ - GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_M) | \ - (((mdid) << GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_S) & \ - GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_M)) - -#define ICE_PROG_FLEX_ENTRY_EXTRACT(hw, rxdid, protid, off, idx) \ - wr32((hw), GLFLXP_RXDID_FLX_WRD_##idx(rxdid), \ - ((ICE_RX_OPC_EXTRACT << \ - GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_S) & \ - GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_M) | \ - (((protid) << GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_S) & \ - GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_M) | \ - (((off) << GLFLXP_RXDID_FLX_WRD_##idx##_EXTRACTION_OFFSET_S) & \ - GLFLXP_RXDID_FLX_WRD_##idx##_EXTRACTION_OFFSET_M)) - -#define ICE_PROG_FLG_ENTRY(hw, rxdid, flg_0, flg_1, flg_2, flg_3, idx) \ - wr32((hw), GLFLXP_RXDID_FLAGS(rxdid, idx), \ - (((flg_0) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S) & \ - GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M) | \ - (((flg_1) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S) & \ - GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_M) | \ - (((flg_2) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_S) & \ - GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_M) | \ - (((flg_3) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_S) & \ - GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_M)) - /** * ice_set_mac_type - Sets MAC type @@ -431,163 +402,6 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, } /** - * ice_init_flex_flags - * @hw: pointer to the hardware structure - * @prof_id: Rx Descriptor Builder profile ID - * - * Function to initialize Rx flex flags - */ -static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id) -{ - u8 idx = 0; - - /* Flex-flag fields (0-2) are programmed with FLG64 bits with layout: - * flexiflags0[5:0] - TCP flags, is_packet_fragmented, is_packet_UDP_GRE - * flexiflags1[3:0] - Not used for flag programming - * flexiflags2[7:0] - Tunnel and VLAN types - * 2 invalid fields in last index - */ - switch (prof_id) { - /* Rx flex flags are currently programmed for the NIC profiles only. - * Different flag bit programming configurations can be added per - * profile as needed. - */ - case ICE_RXDID_FLEX_NIC: - case ICE_RXDID_FLEX_NIC_2: - ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_FRG, - ICE_FLG_UDP_GRE, ICE_FLG_PKT_DSI, - ICE_FLG_FIN, idx++); - /* flex flag 1 is not used for flexi-flag programming, skipping - * these four FLG64 bits. - */ - ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_SYN, ICE_FLG_RST, - ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx++); - ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_DSI, - ICE_FLG_PKT_DSI, ICE_FLG_EVLAN_x8100, - ICE_FLG_EVLAN_x9100, idx++); - ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_VLAN_x8100, - ICE_FLG_TNL_VLAN, ICE_FLG_TNL_MAC, - ICE_FLG_TNL0, idx++); - ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_TNL1, ICE_FLG_TNL2, - ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx); - break; - - default: - ice_debug(hw, ICE_DBG_INIT, - "Flag programming for profile ID %d not supported\n", - prof_id); - } -} - -/** - * ice_init_flex_flds - * @hw: pointer to the hardware structure - * @prof_id: Rx Descriptor Builder profile ID - * - * Function to initialize flex descriptors - */ -static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id) -{ - enum ice_prot_id protid_0, protid_1; - u16 offset_0, offset_1; - enum ice_flex_mdid mdid; - - switch (prof_id) { - case ICE_RXDID_FLEX_NIC: - case ICE_RXDID_FLEX_NIC_2: - ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_LOW, 0); - ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_HIGH, 1); - ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_LOWER, 2); - - mdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ? - ICE_MDID_SRC_VSI : ICE_MDID_FLOW_ID_HIGH; - - ICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3); - - ice_init_flex_flags(hw, prof_id); - break; - case ICE_RXDID_COMMS_GENERIC: - case ICE_RXDID_COMMS_AUX_VLAN: - case ICE_RXDID_COMMS_AUX_IPV4: - case ICE_RXDID_COMMS_AUX_IPV6: - case ICE_RXDID_COMMS_AUX_IPV6_FLOW: - case ICE_RXDID_COMMS_AUX_TCP: - ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_LOW, 0); - ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_HIGH, 1); - ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_LOWER, 2); - ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_HIGH, 3); - - if (prof_id == ICE_RXDID_COMMS_AUX_VLAN) { - /* FlexiMD.4: VLAN1 - single or EVLAN (first for QinQ). - * FlexiMD.5: VLAN2 - C-VLAN (second for QinQ). - */ - protid_0 = ICE_PROT_EVLAN_O; - offset_0 = 0; - protid_1 = ICE_PROT_VLAN_O; - offset_1 = 0; - } else if (prof_id == ICE_RXDID_COMMS_AUX_IPV4) { - /* FlexiMD.4: IPHDR1 - IPv4 header word 4, "TTL" and - * "Protocol" fields. - * FlexiMD.5: IPHDR0 - IPv4 header word 0, "Ver", - * "Hdr Len" and "Type of Service" fields. - */ - protid_0 = ICE_PROT_IPV4_OF_OR_S; - offset_0 = 8; - protid_1 = ICE_PROT_IPV4_OF_OR_S; - offset_1 = 0; - } else if (prof_id == ICE_RXDID_COMMS_AUX_IPV6) { - /* FlexiMD.4: IPHDR1 - IPv6 header word 3, - * "Next Header" and "Hop Limit" fields. - * FlexiMD.5: IPHDR0 - IPv6 header word 0, - * "Ver", "Traffic class" and high 4 bits of - * "Flow Label" fields. - */ - protid_0 = ICE_PROT_IPV6_OF_OR_S; - offset_0 = 6; - protid_1 = ICE_PROT_IPV6_OF_OR_S; - offset_1 = 0; - } else if (prof_id == ICE_RXDID_COMMS_AUX_IPV6_FLOW) { - /* FlexiMD.4: IPHDR1 - IPv6 header word 1, - * 16 low bits of the "Flow Label" field. - * FlexiMD.5: IPHDR0 - IPv6 header word 0, - * "Ver", "Traffic class" and high 4 bits - * of "Flow Label" fields. - */ - protid_0 = ICE_PROT_IPV6_OF_OR_S; - offset_0 = 2; - protid_1 = ICE_PROT_IPV6_OF_OR_S; - offset_1 = 0; - } else if (prof_id == ICE_RXDID_COMMS_AUX_TCP) { - /* FlexiMD.4: TCPHDR - TCP header word 6, - * "Data Offset" and "Flags" fields. - * FlexiMD.5: Reserved - */ - protid_0 = ICE_PROT_TCP_IL; - offset_0 = 12; - protid_1 = ICE_PROT_ID_INVAL; - offset_1 = 0; - } else { - protid_0 = ICE_PROT_ID_INVAL; - offset_0 = 0; - protid_1 = ICE_PROT_ID_INVAL; - offset_1 = 0; - } - - ICE_PROG_FLEX_ENTRY_EXTRACT(hw, prof_id, - protid_0, offset_0, 4); - ICE_PROG_FLEX_ENTRY_EXTRACT(hw, prof_id, - protid_1, offset_1, 5); - - ice_init_flex_flags(hw, prof_id); - break; - default: - ice_debug(hw, ICE_DBG_INIT, - "Field init for profile ID %d not supported\n", - prof_id); - } -} - -/** * ice_aq_set_mac_cfg * @hw: pointer to the HW struct * @max_frame_size: Maximum Frame Size to be supported @@ -928,15 +742,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) if (status) goto err_unroll_fltr_mgmt_struct; - - ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC); - ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2); - ice_init_flex_flds(hw, ICE_RXDID_COMMS_GENERIC); - ice_init_flex_flds(hw, ICE_RXDID_COMMS_AUX_VLAN); - ice_init_flex_flds(hw, ICE_RXDID_COMMS_AUX_IPV4); - ice_init_flex_flds(hw, ICE_RXDID_COMMS_AUX_IPV6); - ice_init_flex_flds(hw, ICE_RXDID_COMMS_AUX_IPV6_FLOW); - ice_init_flex_flds(hw, ICE_RXDID_COMMS_AUX_TCP); /* Obtain counter base index which would be used by flow director */ status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base); if (status)