Shorten the delay for SQ responses, but increase the number of loops.
Max delay time is unchanged, but some operations complete much more
quickly.
In the process, add a new define to make the delay count and delay time
more explicit, and simplify the code so it's the same for both switch
and NIC mode. Add comments to make things more explicit.
Signed-off-by: Mitch Williams <mitch.a.williams@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_controlq.c | 2 +-
drivers/net/ice/base/ice_controlq.h | 5 +++--
drivers/net/ice/base/ice_osdep.h | 2 +-
3 files changed, 5 insertions(+), 4 deletions(-)
@@ -982,7 +982,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
if (ice_sq_done(hw, cq))
break;
- ice_msec_delay(1, false);
+ ice_usec_delay(ICE_CTL_Q_SQ_CMD_USEC, false);
total_delay++;
} while (total_delay < cq->sq_cmd_timeout);
@@ -33,8 +33,9 @@ enum ice_ctl_q {
ICE_CTL_Q_MAILBOX,
};
-/* Control Queue default settings */
-#define ICE_CTL_Q_SQ_CMD_TIMEOUT 250 /* msecs */
+/* Control Queue timeout settings - max delay 250ms */
+#define ICE_CTL_Q_SQ_CMD_TIMEOUT 2500 /* Count 2500 times */
+#define ICE_CTL_Q_SQ_CMD_USEC 100 /* Check every 100usec */
struct ice_ctl_q_ring {
void *dma_head; /* Virtual address to DMA head */
@@ -292,7 +292,7 @@ ice_hweight32(u32 num)
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
#define DELAY(x) rte_delay_us(x)
-#define ice_usec_delay(x) rte_delay_us(x)
+#define ice_usec_delay(x, y) rte_delay_us(x)
#define ice_msec_delay(x, y) rte_delay_us(1000 * (x))
#define udelay(x) DELAY(x)
#define msleep(x) DELAY(1000 * (x))