From patchwork Mon Aug 26 10:50:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 57951 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8E2D51C21F; Mon, 26 Aug 2019 12:51:42 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 7F88C1C13B for ; Mon, 26 Aug 2019 12:50:04 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Aug 2019 03:50:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,431,1559545200"; d="scan'208";a="182402566" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by orsmga003.jf.intel.com with ESMTP; 26 Aug 2019 03:50:02 -0700 From: Qi Zhang To: wenzhuo.lu@intel.com, qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Tony Nguyen , Paul M Stillwell Jr Date: Mon, 26 Aug 2019 18:50:56 +0800 Message-Id: <20190826105105.19121-55-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20190826105105.19121-1-qi.z.zhang@intel.com> References: <20190826105105.19121-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH 54/63] net/ice/base: correct abbreviations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Correct abbreviation issues found by running abbrevcheck. Signed-off-by: Tony Nguyen Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_common.c | 4 ++-- drivers/net/ice/base/ice_controlq.c | 2 +- drivers/net/ice/base/ice_controlq.h | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 22 +++++++++++----------- drivers/net/ice/base/ice_flex_type.h | 2 +- drivers/net/ice/base/ice_flow.c | 2 +- drivers/net/ice/base/ice_type.h | 2 +- 7 files changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index c2d4f1f05..feb7676f8 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -655,10 +655,10 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) /** - * ice_get_itr_intrl_gran - determine int/intrl granularity + * ice_get_itr_intrl_gran * @hw: pointer to the HW struct * - * Determines the itr/intrl granularities based on the maximum aggregate + * Determines the ITR/INTRL granularities based on the maximum aggregate * bandwidth according to the device's configuration during power-on. */ static void ice_get_itr_intrl_gran(struct ice_hw *hw) diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c index 70a50bff4..501f986b9 100644 --- a/drivers/net/ice/base/ice_controlq.c +++ b/drivers/net/ice/base/ice_controlq.c @@ -412,7 +412,7 @@ do { \ /* free the buffer info list */ \ if ((qi)->ring.cmd_buf) \ ice_free(hw, (qi)->ring.cmd_buf); \ - /* free dma head */ \ + /* free DMA head */ \ ice_free(hw, (qi)->ring.dma_head); \ } while (0) diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index 21c8722e5..acb4ab49e 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -37,7 +37,7 @@ enum ice_ctl_q { #define ICE_CTL_Q_SQ_CMD_TIMEOUT 250 /* msecs */ struct ice_ctl_q_ring { - void *dma_head; /* Virtual address to dma head */ + void *dma_head; /* Virtual address to DMA head */ struct ice_dma_mem desc_buf; /* descriptor ring memory */ void *cmd_buf; /* command buffer memory */ diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 6ae71e698..4ad816874 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1921,7 +1921,7 @@ ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port) if (!bld) return ICE_ERR_NO_MEMORY; - /* allocate 2 sections, one for RX parser, one for TX parser */ + /* allocate 2 sections, one for Rx parser, one for Tx parser */ if (ice_pkg_buf_reserve_section(bld, 2)) goto ice_create_tunnel_err; @@ -1951,7 +1951,7 @@ ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port) offsetof(struct ice_boost_key_value, hv_dst_port_key), sizeof(sect_rx->tcam[0].key.key.hv_dst_port_key)); - /* exact copy of entry to TX section entry */ + /* exact copy of entry to Tx section entry */ ice_memcpy(sect_tx->tcam, sect_rx->tcam, sizeof(*sect_tx->tcam), ICE_NONDMA_TO_NONDMA); @@ -2002,7 +2002,7 @@ enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all) if (!bld) return ICE_ERR_NO_MEMORY; - /* allocate 2 sections, one for RX parser, one for TX parser */ + /* allocate 2 sections, one for Rx parser, one for Tx parser */ if (ice_pkg_buf_reserve_section(bld, 2)) goto ice_destroy_tunnel_err; @@ -2020,8 +2020,8 @@ enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all) goto ice_destroy_tunnel_err; sect_tx->count = CPU_TO_LE16(1); - /* copy original boost entry to update package buffer, one copy to RX - * section, another copy to the TX section + /* copy original boost entry to update package buffer, one copy to Rx + * section, another copy to the Tx section */ for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++) if (hw->tnl.tbl[i].valid && hw->tnl.tbl[i].in_use && @@ -2919,7 +2919,7 @@ ice_write_prof_mask_reg(struct ice_hw *hw, enum ice_block blk, u16 mask_idx, * ice_write_prof_mask_enable_res - write profile mask enable register * @hw: pointer to the HW struct * @blk: hardware block - * @prof_id: profile id + * @prof_id: profile ID * @enable_mask: enable mask */ static void @@ -3095,7 +3095,7 @@ ice_free_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 mask_idx) * ice_free_prof_masks - free all profile masks for a profile * @hw: pointer to the HW struct * @blk: hardware block - * @prof_id: profile id + * @prof_id: profile ID */ static enum ice_status ice_free_prof_masks(struct ice_hw *hw, enum ice_block blk, u16 prof_id) @@ -3157,7 +3157,7 @@ void ice_shutdown_all_prof_masks(struct ice_hw *hw) * ice_update_prof_masking - set registers according to masking * @hw: pointer to the HW struct * @blk: hardware block - * @prof_id: profile id + * @prof_id: profile ID * @es: field vector * @masks: masks */ @@ -3377,7 +3377,7 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid) void *sect; /* if the HW segment pointer is null then the first iteration of - * ice_pkg_enum_section() will fail. In this case the Hw tables will + * ice_pkg_enum_section() will fail. In this case the HW tables will * not be filled and return success. */ if (!hw->seg) { @@ -3469,7 +3469,7 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid) return; /* if the sum of section size and offset exceed destination size - * then we are out of bounds of the Hw table size for that PF. + * then we are out of bounds of the HW table size for that PF. * Changing section length to fill the remaining table space * of that PF. */ @@ -3488,7 +3488,7 @@ static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid) * * Reads the current package contents and populates the driver * database with the data iteratively for all advanced feature - * blocks. Assume that the Hw tables have been allocated. + * blocks. Assume that the HW tables have been allocated. */ void ice_fill_blk_tbls(struct ice_hw *hw) { diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index baf53d881..c30d407c2 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -577,7 +577,7 @@ struct ice_xlt1 { /* Vsig bit layout: * [0:12]: incremental vsig index 1 to ICE_MAX_VSIGS - * [13:15]: pf number of device + * [13:15]: PF number of device */ #define ICE_VSIG_IDX_M (0x1FFF) #define ICE_PF_NUM_S 13 diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index f71ac50d6..abdf10b94 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -567,7 +567,7 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params) * ice_flow_xtract_pkt_flags - Create an extr sequence entry for packet flags * @hw: pointer to the HW struct * @params: information about the flow to be processed - * @flags: The value of pkt_flags[x:x] in RX/TX MDID metadata. + * @flags: The value of pkt_flags[x:x] in Rx/Tx MDID metadata. * * This function will allocate an extraction sequence entries for a DWORD size * chunk of the packet flags. diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 403fb7668..deb614e37 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -789,7 +789,7 @@ struct ice_hw { /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL - * register. Used for determining the itr/intrl granularity during + * register. Used for determining the ITR/INTRL granularity during * initialization. */ #define ICE_MAX_AGG_BW_200G 0x0