diff mbox series

[21/63] net/ice/base: fix type-mismatch

Message ID 20190826105105.19121-22-qi.z.zhang@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Qi Zhang
Headers show
Series net/ice/base: update base code | expand

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Zhang, Qi Z Aug. 26, 2019, 10:50 a.m. UTC
The iterators are u8, but the values being compared against are u16s.
It may not ever be the case that the comparison is against a value
larger than the upper bound of the smaller type, but code analysis tools
don't know that.

Fixes: 93e84b1bfc92 ("net/ice/base: add basic Tx scheduler")
Cc: stable@dpdk.org

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 84a033f1c..01c8defae 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -735,7 +735,7 @@  ice_sched_del_rl_profile(struct ice_hw *hw,
  */
 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
 {
-	u8 ln;
+	u16 ln;
 
 	for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
 		struct ice_aqc_rl_profile_info *rl_prof_elem;
@@ -2181,12 +2181,11 @@  static enum ice_status
 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
 		     u16 num_items, u32 *list)
 {
+	enum ice_status status = ICE_SUCCESS;
 	struct ice_aqc_move_elem *buf;
 	struct ice_sched_node *node;
-	enum ice_status status = ICE_SUCCESS;
+	u16 i, grps_movd = 0;
 	struct ice_hw *hw;
-	u16 grps_movd = 0;
-	u8 i;
 
 	hw = pi->hw;
 
@@ -2802,7 +2801,7 @@  ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
  */
 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
 {
-	u8 ln;
+	u16 ln;
 
 	for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
 		struct ice_aqc_rl_profile_info *rl_prof_elem;