@@ -527,6 +527,28 @@ int rte_pci_write_config(const struct rte_pci_device *dev,
return -1;
}
+/* Read PCI MMIO space. */
+int rte_pci_mmio_read(const struct rte_pci_device *dev, int bar,
+ void *buf, size_t len, off_t offset)
+{
+ if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL ||
+ (uint64_t)offset + len > dev->mem_resource[bar].len)
+ return -1;
+ memcpy(buf, (uint8_t *)dev->mem_resource[bar].addr + offset, len);
+ return len;
+}
+
+/* Write PCI MMIO space. */
+int rte_pci_mmio_write(const struct rte_pci_device *dev, int bar,
+ const void *buf, size_t len, off_t offset)
+{
+ if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL ||
+ (uint64_t)offset + len > dev->mem_resource[bar].len)
+ return -1;
+ memcpy((uint8_t *)dev->mem_resource[bar].addr + offset, buf, len);
+ return len;
+}
+
int
rte_pci_ioport_map(struct rte_pci_device *dev, int bar,
struct rte_pci_ioport *p)
@@ -674,6 +674,52 @@ int rte_pci_write_config(const struct rte_pci_device *device,
}
}
+/* Read PCI MMIO space. */
+int rte_pci_mmio_read(const struct rte_pci_device *device, int bar,
+ void *buf, size_t len, off_t offset)
+{
+ char devname[RTE_DEV_NAME_MAX_LEN] = "";
+
+ switch (device->kdrv) {
+ case RTE_KDRV_IGB_UIO:
+ case RTE_KDRV_UIO_GENERIC:
+ return pci_uio_mmio_read(device, bar, buf, len, offset);
+#ifdef VFIO_PRESENT
+ case RTE_KDRV_VFIO:
+ return pci_vfio_mmio_read(device, bar, buf, len, offset);
+#endif
+ default:
+ rte_pci_device_name(&device->addr, devname,
+ RTE_DEV_NAME_MAX_LEN);
+ RTE_LOG(ERR, EAL,
+ "Unknown driver type for %s\n", devname);
+ return -1;
+ }
+}
+
+/* Write PCI MMIO space. */
+int rte_pci_mmio_write(const struct rte_pci_device *device, int bar,
+ const void *buf, size_t len, off_t offset)
+{
+ char devname[RTE_DEV_NAME_MAX_LEN] = "";
+
+ switch (device->kdrv) {
+ case RTE_KDRV_IGB_UIO:
+ case RTE_KDRV_UIO_GENERIC:
+ return pci_uio_mmio_write(device, bar, buf, len, offset);
+#ifdef VFIO_PRESENT
+ case RTE_KDRV_VFIO:
+ return pci_vfio_mmio_write(device, bar, buf, len, offset);
+#endif
+ default:
+ rte_pci_device_name(&device->addr, devname,
+ RTE_DEV_NAME_MAX_LEN);
+ RTE_LOG(ERR, EAL,
+ "Unknown driver type for %s\n", devname);
+ return -1;
+ }
+}
+
#if defined(RTE_ARCH_X86)
static int
pci_ioport_map(struct rte_pci_device *dev, int bar __rte_unused,
@@ -35,6 +35,11 @@ int pci_uio_read_config(const struct rte_intr_handle *intr_handle,
int pci_uio_write_config(const struct rte_intr_handle *intr_handle,
const void *buf, size_t len, off_t offs);
+int pci_uio_mmio_read(const struct rte_pci_device *dev, int bar,
+ void *buf, size_t len, off_t offset);
+int pci_uio_mmio_write(const struct rte_pci_device *dev, int bar,
+ const void *buf, size_t len, off_t offset);
+
int pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
struct rte_pci_ioport *p);
void pci_uio_ioport_read(struct rte_pci_ioport *p,
@@ -69,6 +74,11 @@ int pci_vfio_read_config(const struct rte_pci_device *dev,
int pci_vfio_write_config(const struct rte_pci_device *dev,
const void *buf, size_t len, off_t offs);
+int pci_vfio_mmio_read(const struct rte_pci_device *dev, int bar,
+ void *buf, size_t len, off_t offset);
+int pci_vfio_mmio_write(const struct rte_pci_device *dev, int bar,
+ const void *buf, size_t len, off_t offset);
+
int pci_vfio_ioport_map(struct rte_pci_device *dev, int bar,
struct rte_pci_ioport *p);
void pci_vfio_ioport_read(struct rte_pci_ioport *p,
@@ -45,6 +45,28 @@ pci_uio_write_config(const struct rte_intr_handle *intr_handle,
return pwrite(intr_handle->uio_cfg_fd, buf, len, offset);
}
+int
+pci_uio_mmio_read(const struct rte_pci_device *dev, int bar,
+ void *buf, size_t len, off_t offset)
+{
+ if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL ||
+ (uint64_t)offset + len > dev->mem_resource[bar].len)
+ return -1;
+ memcpy(buf, (uint8_t *)dev->mem_resource[bar].addr + offset, len);
+ return len;
+}
+
+int
+pci_uio_mmio_write(const struct rte_pci_device *dev, int bar,
+ const void *buf, size_t len, off_t offset)
+{
+ if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL ||
+ (uint64_t)offset + len > dev->mem_resource[bar].len)
+ return -1;
+ memcpy((uint8_t *)dev->mem_resource[bar].addr + offset, buf, len);
+ return len;
+}
+
static int
pci_uio_set_bus_master(int dev_fd)
{
@@ -1164,6 +1164,42 @@ pci_vfio_ioport_unmap(struct rte_pci_ioport *p)
return -1;
}
+int
+pci_vfio_mmio_read(const struct rte_pci_device *dev, int bar,
+ void *buf, size_t len, off_t offs)
+{
+ uint64_t size, offset;
+ int fd;
+
+ fd = dev->intr_handle.vfio_dev_fd;
+
+ if (pci_vfio_get_region(dev, bar, &size, &offset) != 0)
+ return -1;
+
+ if ((uint64_t)len + offs > size)
+ return -1;
+
+ return pread64(fd, buf, len, offset + offs);
+}
+
+int
+pci_vfio_mmio_write(const struct rte_pci_device *dev, int bar,
+ const void *buf, size_t len, off_t offs)
+{
+ uint64_t size, offset;
+ int fd;
+
+ fd = dev->intr_handle.vfio_dev_fd;
+
+ if (pci_vfio_get_region(dev, bar, &size, &offset) != 0)
+ return -1;
+
+ if ((uint64_t)len + offs > size)
+ return -1;
+
+ return pwrite64(fd, buf, len, offset + offs);
+}
+
int
pci_vfio_is_enabled(void)
{
@@ -285,6 +285,54 @@ int rte_pci_read_config(const struct rte_pci_device *device,
int rte_pci_write_config(const struct rte_pci_device *device,
const void *buf, size_t len, off_t offset);
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change without prior notice
+ *
+ * Read from a MMIO pci resource.
+ *
+ * @param device
+ * A pointer to a rte_pci_device structure describing the device
+ * to use
+ * @param bar
+ * Index of the io pci resource we want to access.
+ * @param buf
+ * A data buffer where the bytes should be read into
+ * @param len
+ * The length of the data buffer.
+ * @param offset
+ * The offset into MMIO space described by @bar
+ * @return
+ * Number of bytes read on success, negative on error.
+ */
+__rte_experimental
+int rte_pci_mmio_read(const struct rte_pci_device *device, int bar,
+ void *buf, size_t len, off_t offset);
+
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change without prior notice
+ *
+ * Write to a MMIO pci resource.
+ *
+ * @param device
+ * A pointer to a rte_pci_device structure describing the device
+ * to use
+ * @param bar
+ * Index of the io pci resource we want to access.
+ * @param buf
+ * A data buffer containing the bytes should be written
+ * @param len
+ * The length of the data buffer.
+ * @param offset
+ * The offset into MMIO space described by @bar
+ * @return
+ * Number of bytes written on success, negative on error.
+ */
+__rte_experimental
+int rte_pci_mmio_write(const struct rte_pci_device *device, int bar,
+ const void *buf, size_t len, off_t offset);
+
/**
* A structure used to access io resources for a pci device.
* rte_pci_ioport is arch, os, driver specific, and should not be used outside
@@ -16,3 +16,10 @@ DPDK_17.11 {
local: *;
};
+
+EXPERIMENTAL {
+ global:
+
+ rte_pci_mmio_read;
+ rte_pci_mmio_write;
+};