From patchwork Fri Jun 28 18:23:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 55631 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DB2B51BACD; Fri, 28 Jun 2019 20:25:27 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 9A7ED1B9F0 for ; Fri, 28 Jun 2019 20:25:01 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5SILsKQ011627; Fri, 28 Jun 2019 11:25:00 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=50nHWItAX31rIxFZ3KvX+OUdcPvLZ5wAZqy/mFSibpg=; b=NbgBhSTBq0lOXwivOpKBldPJcdzYFSVLZVZvafEDF3MxZ1lutiI6Kw3CwIksOOmqsOnj wXdR2MSNT2SOnTL+yhVGuRjZzA/88xn8c9kMn+qfg9OvfL18OzMiWtCvkRZ5dpTywmCW dU7poj48Orpo5KM913cFoO4QIFaKQuxKhlgZPgQu6LMC0RFJ1ts8A9RpTIBX0wU1RqXk lWxXI34u4fTuwaTH+iv8bna318WaykjnnbPNvsTu0ipsMWim+7QzxksceJzGTTild2na 9AOjLaiUyEVSpaPlCZ3qc6SvXL1THze1DgZ4CPqnUncEo7flfJ8tEU+WYyzewZCeU4Ir 3Q== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0a-0016f401.pphosted.com with ESMTP id 2tdd77agp1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 28 Jun 2019 11:25:00 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Fri, 28 Jun 2019 11:24:59 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Fri, 28 Jun 2019 11:24:59 -0700 Received: from BG-LT7430.marvell.com (unknown [10.28.17.12]) by maili.marvell.com (Postfix) with ESMTP id 9A5413F7040; Fri, 28 Jun 2019 11:24:57 -0700 (PDT) From: To: , Pavan Nikhilesh , "John McNamara" , Marko Kovacevic , Anatoly Burakov CC: Date: Fri, 28 Jun 2019 23:53:37 +0530 Message-ID: <20190628182354.228-27-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190628182354.228-1-pbhagavatula@marvell.com> References: <20190628182354.228-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-28_08:, , signatures=0 Subject: [dpdk-dev] [PATCH v3 26/42] event/octeontx2: add event timer support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add event timer adapter aka TIM initilization on SSO probe. Signed-off-by: Pavan Nikhilesh --- doc/guides/eventdevs/octeontx2.rst | 6 ++ drivers/event/octeontx2/Makefile | 1 + drivers/event/octeontx2/meson.build | 1 + drivers/event/octeontx2/otx2_evdev.c | 3 + drivers/event/octeontx2/otx2_tim_evdev.c | 78 ++++++++++++++++++++++++ drivers/event/octeontx2/otx2_tim_evdev.h | 36 +++++++++++ 6 files changed, 125 insertions(+) create mode 100644 drivers/event/octeontx2/otx2_tim_evdev.c create mode 100644 drivers/event/octeontx2/otx2_tim_evdev.h diff --git a/doc/guides/eventdevs/octeontx2.rst b/doc/guides/eventdevs/octeontx2.rst index 562a83d07..98d0dfb6f 100644 --- a/doc/guides/eventdevs/octeontx2.rst +++ b/doc/guides/eventdevs/octeontx2.rst @@ -28,6 +28,10 @@ Features of the OCTEON TX2 SSO PMD are: - Open system with configurable amount of outstanding events limited only by DRAM - HW accelerated dequeue timeout support to enable power management +- HW managed event timers support through TIM, with high precision and + time granularity of 2.5us. +- Up to 256 TIM rings aka event timer adapters. +- Up to 8 rings traversed in parallel. Prerequisites and Compilation procedure --------------------------------------- @@ -102,3 +106,5 @@ Debugging Options +===+============+=======================================================+ | 1 | SSO | --log-level='pmd\.event\.octeontx2,8' | +---+------------+-------------------------------------------------------+ + | 2 | TIM | --log-level='pmd\.event\.octeontx2\.timer,8' | + +---+------------+-------------------------------------------------------+ diff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile index d6cffc1f6..2290622dd 100644 --- a/drivers/event/octeontx2/Makefile +++ b/drivers/event/octeontx2/Makefile @@ -33,6 +33,7 @@ LIBABIVER := 1 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker_dual.c SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker.c SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c +SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_tim_evdev.c SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_selftest.c SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_irq.c diff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build index 470564b08..ad7f2e084 100644 --- a/drivers/event/octeontx2/meson.build +++ b/drivers/event/octeontx2/meson.build @@ -7,6 +7,7 @@ sources = files('otx2_worker.c', 'otx2_evdev.c', 'otx2_evdev_irq.c', 'otx2_evdev_selftest.c', + 'otx2_tim_evdev.c', ) allow_experimental_apis = true diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c index c5a150954..a716167b3 100644 --- a/drivers/event/octeontx2/otx2_evdev.c +++ b/drivers/event/octeontx2/otx2_evdev.c @@ -15,6 +15,7 @@ #include "otx2_evdev_stats.h" #include "otx2_evdev.h" #include "otx2_irq.h" +#include "otx2_tim_evdev.h" static inline int sso_get_msix_offsets(const struct rte_eventdev *event_dev) @@ -1310,6 +1311,7 @@ otx2_sso_init(struct rte_eventdev *event_dev) event_dev->dev_ops->dev_selftest(); } + otx2_tim_init(pci_dev, (struct otx2_dev *)dev); return 0; @@ -1345,6 +1347,7 @@ otx2_sso_fini(struct rte_eventdev *event_dev) return -EAGAIN; } + otx2_tim_fini(); otx2_dev_fini(pci_dev, dev); return 0; diff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c new file mode 100644 index 000000000..004701f64 --- /dev/null +++ b/drivers/event/octeontx2/otx2_tim_evdev.c @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2019 Marvell International Ltd. + */ + +#include "otx2_evdev.h" +#include "otx2_tim_evdev.h" + +void +otx2_tim_init(struct rte_pci_device *pci_dev, struct otx2_dev *cmn_dev) +{ + struct rsrc_attach_req *atch_req; + struct free_rsrcs_rsp *rsrc_cnt; + const struct rte_memzone *mz; + struct otx2_tim_evdev *dev; + int rc; + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return; + + mz = rte_memzone_reserve(RTE_STR(OTX2_TIM_EVDEV_NAME), + sizeof(struct otx2_tim_evdev), + rte_socket_id(), 0); + if (mz == NULL) { + otx2_tim_dbg("Unable to allocate memory for TIM Event device"); + return; + } + + dev = mz->addr; + dev->pci_dev = pci_dev; + dev->mbox = cmn_dev->mbox; + dev->bar2 = cmn_dev->bar2; + + otx2_mbox_alloc_msg_free_rsrc_cnt(dev->mbox); + rc = otx2_mbox_process_msg(dev->mbox, (void *)&rsrc_cnt); + if (rc < 0) { + otx2_err("Unable to get free rsrc count."); + goto mz_free; + } + + dev->nb_rings = rsrc_cnt->tim; + + if (!dev->nb_rings) { + otx2_tim_dbg("No TIM Logical functions provisioned."); + goto mz_free; + } + + atch_req = otx2_mbox_alloc_msg_attach_resources(dev->mbox); + atch_req->modify = true; + atch_req->timlfs = dev->nb_rings; + + rc = otx2_mbox_process(dev->mbox); + if (rc < 0) { + otx2_err("Unable to attach TIM rings."); + goto mz_free; + } + + return; + +mz_free: + rte_memzone_free(mz); +} + +void +otx2_tim_fini(void) +{ + struct otx2_tim_evdev *dev = tim_priv_get(); + struct rsrc_detach_req *dtch_req; + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return; + + dtch_req = otx2_mbox_alloc_msg_detach_resources(dev->mbox); + dtch_req->partial = true; + dtch_req->timlfs = true; + + otx2_mbox_process(dev->mbox); + rte_memzone_free(rte_memzone_lookup(RTE_STR(OTX2_TIM_EVDEV_NAME))); +} diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h new file mode 100644 index 000000000..9f7aeb7df --- /dev/null +++ b/drivers/event/octeontx2/otx2_tim_evdev.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2019 Marvell International Ltd. + */ + +#ifndef __OTX2_TIM_EVDEV_H__ +#define __OTX2_TIM_EVDEV_H__ + +#include + +#include "otx2_dev.h" + +#define OTX2_TIM_EVDEV_NAME otx2_tim_eventdev + +struct otx2_tim_evdev { + struct rte_pci_device *pci_dev; + struct otx2_mbox *mbox; + uint16_t nb_rings; + uintptr_t bar2; +}; + +static inline struct otx2_tim_evdev * +tim_priv_get(void) +{ + const struct rte_memzone *mz; + + mz = rte_memzone_lookup(RTE_STR(OTX2_TIM_EVDEV_NAME)); + if (mz == NULL) + return NULL; + + return mz->addr; +} + +void otx2_tim_init(struct rte_pci_device *pci_dev, struct otx2_dev *cmn_dev); +void otx2_tim_fini(void); + +#endif /* __OTX2_TIM_EVDEV_H__ */