diff mbox series

[v3,21/42] event/octeontx2: add devargs to force legacy mode

Message ID 20190628182354.228-22-pbhagavatula@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers show
Series OCTEONTX2 event device driver | expand

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail apply issues

Commit Message

Pavan Nikhilesh Bhagavatula June 28, 2019, 6:23 p.m. UTC
From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Octeontx2 SSO by default is set to use dual workslot mode.
Add devargs option to force legacy mode i.e. single workslot mode.
Example:
	--dev "0002:0e:00.0,single_ws=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 doc/guides/eventdevs/octeontx2.rst   |  8 ++++++++
 drivers/event/octeontx2/otx2_evdev.c |  8 +++++++-
 drivers/event/octeontx2/otx2_evdev.h | 11 ++++++++++-
 3 files changed, 25 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/doc/guides/eventdevs/octeontx2.rst b/doc/guides/eventdevs/octeontx2.rst
index f83cf1e9d..c864f39f9 100644
--- a/doc/guides/eventdevs/octeontx2.rst
+++ b/doc/guides/eventdevs/octeontx2.rst
@@ -58,6 +58,14 @@  Runtime Config Options
 
     --dev "0002:0e:00.0,xae_cnt=16384"
 
+- ``Force legacy mode``
+
+  The ``single_ws`` devargs parameter is introduced to force legacy mode i.e
+  single workslot mode in SSO and disable the default dual workslot mode.
+  For example::
+
+    --dev "0002:0e:00.0,single_ws=1"
+
 Debugging Options
 ~~~~~~~~~~~~~~~~~
 
diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index 16d5e7dfa..5dc39f029 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -911,11 +911,13 @@  static struct rte_eventdev_ops otx2_sso_ops = {
 };
 
 #define OTX2_SSO_XAE_CNT	"xae_cnt"
+#define OTX2_SSO_SINGLE_WS	"single_ws"
 
 static void
 sso_parse_devargs(struct otx2_sso_evdev *dev, struct rte_devargs *devargs)
 {
 	struct rte_kvargs *kvlist;
+	uint8_t single_ws = 0;
 
 	if (devargs == NULL)
 		return;
@@ -925,7 +927,10 @@  sso_parse_devargs(struct otx2_sso_evdev *dev, struct rte_devargs *devargs)
 
 	rte_kvargs_process(kvlist, OTX2_SSO_XAE_CNT, &parse_kvargs_value,
 			   &dev->xae_cnt);
+	rte_kvargs_process(kvlist, OTX2_SSO_SINGLE_WS, &parse_kvargs_flag,
+			   &single_ws);
 
+	dev->dual_ws = !single_ws;
 	rte_kvargs_free(kvlist);
 }
 
@@ -1075,4 +1080,5 @@  otx2_sso_fini(struct rte_eventdev *event_dev)
 RTE_PMD_REGISTER_PCI(event_octeontx2, pci_sso);
 RTE_PMD_REGISTER_PCI_TABLE(event_octeontx2, pci_sso_map);
 RTE_PMD_REGISTER_KMOD_DEP(event_octeontx2, "vfio-pci");
-RTE_PMD_REGISTER_PARAM_STRING(event_octeontx2, OTX2_SSO_XAE_CNT "=<int>");
+RTE_PMD_REGISTER_PARAM_STRING(event_octeontx2, OTX2_SSO_XAE_CNT "=<int>"
+			      OTX2_SSO_SINGLE_WS "=1");
diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index 30b5d2c32..8e614b109 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -121,8 +121,8 @@  struct otx2_sso_evdev {
 	uint64_t nb_xaq_cfg;
 	rte_iova_t fc_iova;
 	struct rte_mempool *xaq_pool;
-	uint8_t dual_ws;
 	/* Dev args */
+	uint8_t dual_ws;
 	uint32_t xae_cnt;
 	/* HW const */
 	uint32_t xae_waes;
@@ -178,6 +178,15 @@  sso_pmd_priv(const struct rte_eventdev *event_dev)
 	return event_dev->data->dev_private;
 }
 
+static inline int
+parse_kvargs_flag(const char *key, const char *value, void *opaque)
+{
+	RTE_SET_USED(key);
+
+	*(uint8_t *)opaque = !!atoi(value);
+	return 0;
+}
+
 static inline int
 parse_kvargs_value(const char *key, const char *value, void *opaque)
 {