From patchwork Sat Jun 1 18:53:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 54035 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C01641B9D8; Sat, 1 Jun 2019 20:56:35 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id BA4F61B957 for ; Sat, 1 Jun 2019 20:55:51 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x51Itbrf030054 for ; Sat, 1 Jun 2019 11:55:51 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=5Eb73pIkX3TKRXNP/yMyesMkM7tVeXxBHs18sYYfUuY=; b=PVLmPJQ5Yb2m0rnOfF3Xvr89ewJRYNA7P1xO/ea/f3Km7W0I0k7ojoDxJneDZbCu7tV8 MP/OQjA2nIc8Zg0DObHE6DNf+Y9i7/7BU5YxERKzE9rQr7QwAj5fXNQhsLC8kbE7yQ7k QRahGl/ctr1clRKtJEbmMpN3dMBV7AEkr45fw2O+vLQQdcJOJDP59CqlBWTmMwOIryd0 N0RSNgnRjoXmLEtjfzlSI2GCb7wWkNWaqlg4bQPplnpXYANukFzklj+aTiFz+w8HyXpk rpX1Z1/ebLxuuvniDiDeTyY8KBj2cjGCvTRqQWByooY8IO1DaBxPgS5oon7p/GdYRTzt bA== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0b-0016f401.pphosted.com with ESMTP id 2survk12ep-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 01 Jun 2019 11:55:51 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Sat, 1 Jun 2019 11:55:49 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Sat, 1 Jun 2019 11:55:49 -0700 Received: from BG-LT7430.marvell.com (unknown [10.28.17.28]) by maili.marvell.com (Postfix) with ESMTP id A19343F704B; Sat, 1 Jun 2019 11:55:48 -0700 (PDT) From: To: , Pavan Nikhilesh CC: Date: Sun, 2 Jun 2019 00:23:31 +0530 Message-ID: <20190601185355.370-22-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190601185355.370-1-pbhagavatula@marvell.com> References: <20190601185355.370-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-01_13:, , signatures=0 Subject: [dpdk-dev] [PATCH 21/44] event/octeontx2: add devargs to force legacy mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Octeontx2 SSO by default is set to use dual workslot mode. Add devargs option to force legacy mode i.e. single workslot mode. Example: --dev "0002:0e:00.0,single_ws=1" Signed-off-by: Pavan Nikhilesh --- drivers/event/octeontx2/otx2_evdev.c | 8 +++++++- drivers/event/octeontx2/otx2_evdev.h | 11 ++++++++++- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c index 3979bed9a..906c6c81b 100644 --- a/drivers/event/octeontx2/otx2_evdev.c +++ b/drivers/event/octeontx2/otx2_evdev.c @@ -906,11 +906,13 @@ static struct rte_eventdev_ops otx2_sso_ops = { }; #define OTX2_SSO_XAE_CNT "xae_cnt" +#define OTX2_SSO_SINGLE_WS "single_ws" static void sso_parse_devargs(struct otx2_sso_evdev *dev, struct rte_devargs *devargs) { struct rte_kvargs *kvlist; + uint8_t single_ws = 0; if (devargs == NULL) return; @@ -920,7 +922,10 @@ sso_parse_devargs(struct otx2_sso_evdev *dev, struct rte_devargs *devargs) rte_kvargs_process(kvlist, OTX2_SSO_XAE_CNT, &parse_kvargs_value, &dev->xae_cnt); + rte_kvargs_process(kvlist, OTX2_SSO_SINGLE_WS, &parse_kvargs_flag, + &single_ws); + dev->dual_ws = !single_ws; rte_kvargs_free(kvlist); } @@ -1071,4 +1076,5 @@ otx2_sso_fini(struct rte_eventdev *event_dev) RTE_PMD_REGISTER_PCI(event_octeontx2, pci_sso); RTE_PMD_REGISTER_PCI_TABLE(event_octeontx2, pci_sso_map); RTE_PMD_REGISTER_KMOD_DEP(event_octeontx2, "vfio-pci"); -RTE_PMD_REGISTER_PARAM_STRING(event_octeontx2, OTX2_SSO_XAE_CNT "="); +RTE_PMD_REGISTER_PARAM_STRING(event_octeontx2, OTX2_SSO_XAE_CNT "=" + OTX2_SSO_SINGLE_WS "=1"); diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h index 2b4e32c19..1d8eaf29d 100644 --- a/drivers/event/octeontx2/otx2_evdev.h +++ b/drivers/event/octeontx2/otx2_evdev.h @@ -106,8 +106,8 @@ struct otx2_sso_evdev { uint64_t nb_xaq_cfg; rte_iova_t fc_iova; struct rte_mempool *xaq_pool; - uint8_t dual_ws; /* Dev args */ + uint8_t dual_ws; uint32_t xae_cnt; /* HW const */ uint32_t xae_waes; @@ -163,6 +163,15 @@ sso_pmd_priv(const struct rte_eventdev *event_dev) return event_dev->data->dev_private; } +static inline int +parse_kvargs_flag(const char *key, const char *value, void *opaque) +{ + RTE_SET_USED(key); + + *(uint8_t *)opaque = !!atoi(value); + return 0; +} + static inline int parse_kvargs_value(const char *key, const char *value, void *opaque) {