From patchwork Mon Apr 8 18:23:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yongseok Koh X-Patchwork-Id: 52435 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8F7582BCE; Mon, 8 Apr 2019 20:23:19 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id AB986A3 for ; Mon, 8 Apr 2019 20:23:17 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from yskoh@mellanox.com) with ESMTPS (AES256-SHA encrypted); 8 Apr 2019 21:23:16 +0300 Received: from scfae-sc-2.mti.labs.mlnx (scfae-sc-2.mti.labs.mlnx [10.101.0.96]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x38INFkH017086; Mon, 8 Apr 2019 21:23:15 +0300 From: Yongseok Koh To: shahafs@mellanox.com Cc: dev@dpdk.org Date: Mon, 8 Apr 2019 11:23:13 -0700 Message-Id: <20190408182313.39182-1-yskoh@mellanox.com> X-Mailer: git-send-email 2.11.0 Subject: [dpdk-dev] [PATCH] net/mlx4: fix Tx doorbell register unmap X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" If rdma-core library doesn't support remapping UAR registers, the register shouldn't be unmapped on device stop. Fixes: 0203d33a1059 ("net/mlx4: support secondary process") Signed-off-by: Yongseok Koh --- drivers/net/mlx4/mlx4.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index 252658fc6a..9bca0ce9cd 100644 --- a/drivers/net/mlx4/mlx4.c +++ b/drivers/net/mlx4/mlx4.c @@ -314,8 +314,10 @@ static void mlx4_dev_stop(struct rte_eth_dev *dev) { struct mlx4_priv *priv = dev->data->dev_private; +#ifdef HAVE_IBV_MLX4_UAR_MMAP_OFFSET const size_t page_size = sysconf(_SC_PAGESIZE); int i; +#endif if (!priv->started) return; @@ -329,6 +331,7 @@ mlx4_dev_stop(struct rte_eth_dev *dev) mlx4_flow_sync(priv, NULL); mlx4_rxq_intr_disable(priv); mlx4_rss_deinit(priv); +#ifdef HAVE_IBV_MLX4_UAR_MMAP_OFFSET for (i = 0; i != dev->data->nb_tx_queues; ++i) { struct txq *txq; @@ -338,6 +341,7 @@ mlx4_dev_stop(struct rte_eth_dev *dev) munmap((void *)RTE_ALIGN_FLOOR((uintptr_t)txq->msq.db, page_size), page_size); } +#endif } /**