diff mbox series

[29/31] net/bnxt: fix incorrect IO address handling in Tx

Message ID	20180619213058.12273-30-ajit.khaparde@broadcom.com (mailing list archive)
State	Changes Requested, archived
Delegated to:	Ferruh Yigit
Headers	From: Ajit Khaparde <ajit.khaparde@broadcom.com> To: dev@dpdk.org Cc: ferruh.yigit@intel.com, stable@dpdk.org Date: Tue, 19 Jun 2018 14:30:56 -0700 Message-Id: <20180619213058.12273-30-ajit.khaparde@broadcom.com> In-Reply-To: <20180619213058.12273-1-ajit.khaparde@broadcom.com> References: <20180619213058.12273-1-ajit.khaparde@broadcom.com> Subject: [dpdk-dev] [PATCH 29/31] net/bnxt: fix incorrect IO address handling in Tx Precedence: list Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org>
Series	bnxt patchset \| [00/31] bnxt patchset [01/31] net/bnxt: fix clear port stats [02/31] net/bnxt: add Tx batching support [03/31] net/bnxt: Rx processing optimization [04/31] net/bnxt: set min and max descriptor count for Tx and Rx rings [05/31] net/bnxt: fix dev close operation [06/31] net/bnxt: set ring coalesce parameters for Stratus NIC [07/31] net/bnxt: fix HW Tx checksum offload check [08/31] net/bnxt: add support for VF id 0xd800 [09/31] net/bnxt: fix rx/tx queue start/stop operations [10/31] net/bnxt: code cleanup style of bnxt cpr [11/31] net/bnxt: code cleanup style of bnxt rxr [12/31] net/bnxt: code cleanup style of rte pmd bnxt file [13/31] net/bnxt: code cleanup style of bnxt stats [14/31] net/bnxt: code cleanup style of bnxt vnic [15/31] net/bnxt: code cleanup style of bnxt txq [16/31] net/bnxt: code cleanup style of bnxt rxq [17/31] net/bnxt: code cleanup style of bnxt vnic [18/31] net/bnxt: code cleanup style of bnxt txr [19/31] net/bnxt: code cleanup style of bnxt ring [20/31] net/bnxt: code cleanup style of bnxt ethdev [21/31] net/bnxt: move function check zero bytes to bnxt util.h [22/31] net/bnxt: filter/flow refactoring [23/31] net/bnxt: check for invalid vnic id [24/31] net/bnxt: update HWRM API to v1.9.2.9 [25/31] net/bnxt: fix Tx with multiple mbuf [26/31] net/bnxt: Revert reset of L2 filter id in clear_ntuple_filter [27/31] net/bnxt: check filter type before clearing it [28/31] net/bnxt: fix set MTU [29/31] net/bnxt: fix incorrect IO address handling in Tx [30/31] net/bnxt: allocate RSS context only if RSS mode is enabled. [31/31] net/bnxt: fix to move a flow to a different queue

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK
ci/Intel-compilation	success	Compilation OK

Commit Message

Ajit Khaparde June 19, 2018, 9:30 p.m. UTC

  rte_mbuf_data_iova returns a 64-bit address. But we are incorrectly
using only 32-bits of that. Use rte_cpu_to_le_64 instead of
rte_cpu_to_le_32

Fixes: 6eb3cc2294fd ("net/bnxt: add initial Tx code")
Cc: stable@dpdk.org

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/bnxt_txr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff mbox series

Patch

diff --git a/drivers/net/bnxt/bnxt_txr.c b/drivers/net/bnxt/bnxt_txr.c
index 23c8e6660..4e684f208 100644
--- a/drivers/net/bnxt/bnxt_txr.c
+++ b/drivers/net/bnxt/bnxt_txr.c
@@ -164,7 +164,7 @@  static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt,
 		txbd->flags_type |= TX_BD_LONG_FLAGS_LHINT_GTE2K;
 	else
 		txbd->flags_type |= lhint_arr[tx_pkt->pkt_len >> 9];
-	txbd->address = rte_cpu_to_le_32(rte_mbuf_data_iova(tx_buf->mbuf));
+	txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(tx_buf->mbuf));
 
 	if (long_bd) {
 		txbd->flags_type |= TX_BD_LONG_TYPE_TX_BD_LONG;
@@ -287,7 +287,7 @@  static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt,
 		tx_buf = &txr->tx_buf_ring[txr->tx_prod];
 
 		txbd = &txr->tx_desc_ring[txr->tx_prod];
-		txbd->address = rte_cpu_to_le_32(rte_mbuf_data_iova(m_seg));
+		txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(m_seg));
 		txbd->flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT;
 		txbd->len = m_seg->data_len;